src/cpu/simple_thread.cc

   1 /*
   2  * Copyright (c) 2001-2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Steve Reinhardt
  29  *          Nathan Binkert
  30  *          Lisa Hsu
  31  *          Kevin Lim
  32  */
  33
  34 #include <string>
  35
  36 #include "arch/isa_traits.hh"
  37 #include "cpu/base.hh"
  38 #include "cpu/simple_thread.hh"
  39 #include "cpu/thread_context.hh"
  40
  41 #if FULL_SYSTEM
  42 #include "arch/kernel_stats.hh"
  43 #include "base/callback.hh"
  44 #include "base/cprintf.hh"
  45 #include "base/output.hh"
  46 #include "base/trace.hh"
  47 #include "cpu/profile.hh"
  48 #include "cpu/quiesce_event.hh"
  49 #include "sim/serialize.hh"
  50 #include "sim/sim_exit.hh"
  51 #include "arch/stacktrace.hh"
  52 #else
  53 #include "sim/process.hh"
  54 #include "sim/system.hh"
  55 #include "mem/translating_port.hh"
  56 #endif
  57
  58 using namespace std;
  59
  60 // constructor
  61 #if FULL_SYSTEM
  62 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
  63                            TheISA::ITB *_itb, TheISA::DTB *_dtb,
  64                            bool use_kernel_stats)
  65     : ThreadState(_cpu, -1, _thread_num), cpu(_cpu), system(_sys), itb(_itb),
  66       dtb(_dtb)
  67
  68 {
  69     tc = new ProxyThreadContext<SimpleThread>(this);
  70
  71     quiesceEvent = new EndQuiesceEvent(tc);
  72
  73     regs.clear();
  74
  75     if (cpu->params->profile) {
  76         profile = new FunctionProfile(system->kernelSymtab);
  77         Callback *cb =
  78             new MakeCallback<SimpleThread,
  79             &SimpleThread::dumpFuncProfile>(this);
  80         registerExitCallback(cb);
  81     }
  82
  83     // let's fill with a dummy node for now so we don't get a segfault
  84     // on the first cycle when there's no node available.
  85     static ProfileNode dummyNode;
  86     profileNode = &dummyNode;
  87     profilePC = 3;
  88
  89     if (use_kernel_stats) {
  90         kernelStats = new TheISA::Kernel::Statistics(system);
  91     } else {
  92         kernelStats = NULL;
  93     }
  94     Port *mem_port;
  95     physPort = new FunctionalPort(csprintf("%s-%d-funcport",
  96                                            cpu->name(), tid));
  97     mem_port = system->physmem->getPort("functional");
  98     mem_port->setPeer(physPort);
  99     physPort->setPeer(mem_port);
 100
 101     virtPort = new VirtualPort(csprintf("%s-%d-vport",
 102                                         cpu->name(), tid));
 103     mem_port = system->physmem->getPort("functional");
 104     mem_port->setPeer(virtPort);
 105     virtPort->setPeer(mem_port);
 106 }
 107 #else
 108 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num,
 109                          Process *_process, int _asid)
 110     : ThreadState(_cpu, -1, _thread_num, _process, _asid),
 111       cpu(_cpu)
 112 {
 113     regs.clear();
 114     tc = new ProxyThreadContext<SimpleThread>(this);
 115 }
 116
 117 #endif
 118
 119 SimpleThread::SimpleThread()
 120 #if FULL_SYSTEM
 121     : ThreadState(NULL, -1, -1)
 122 #else
 123     : ThreadState(NULL, -1, -1, NULL, -1)
 124 #endif
 125 {
 126     tc = new ProxyThreadContext<SimpleThread>(this);
 127     regs.clear();
 128 }
 129
 130 SimpleThread::~SimpleThread()
 131 {
 132 #if FULL_SYSTEM
 133     delete physPort;
 134     delete virtPort;
 135 #endif
 136     delete tc;
 137 }
 138
 139 void
 140 SimpleThread::takeOverFrom(ThreadContext *oldContext)
 141 {
 142     // some things should already be set up
 143 #if FULL_SYSTEM
 144     assert(system == oldContext->getSystemPtr());
 145 #else
 146     assert(process == oldContext->getProcessPtr());
 147 #endif
 148
 149     copyState(oldContext);
 150 #if FULL_SYSTEM
 151     EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent();
 152     if (quiesce) {
 153         // Point the quiesce event's TC at this TC so that it wakes up
 154         // the proper CPU.
 155         quiesce->tc = tc;
 156     }
 157     if (quiesceEvent) {
 158         quiesceEvent->tc = tc;
 159     }
 160
 161     TheISA::Kernel::Statistics *stats = oldContext->getKernelStats();
 162     if (stats) {
 163         kernelStats = stats;
 164     }
 165 #endif
 166
 167     storeCondFailures = 0;
 168
 169     oldContext->setStatus(ThreadContext::Unallocated);
 170 }
 171
 172 void
 173 SimpleThread::copyTC(ThreadContext *context)
 174 {
 175     copyState(context);
 176
 177 #if FULL_SYSTEM
 178     EndQuiesceEvent *quiesce = context->getQuiesceEvent();
 179     if (quiesce) {
 180         quiesceEvent = quiesce;
 181     }
 182     TheISA::Kernel::Statistics *stats = context->getKernelStats();
 183     if (stats) {
 184         kernelStats = stats;
 185     }
 186 #endif
 187 }
 188
 189 void
 190 SimpleThread::copyState(ThreadContext *oldContext)
 191 {
 192     // copy over functional state
 193     _status = oldContext->status();
 194     copyArchRegs(oldContext);
 195     cpuId = oldContext->readCpuId();
 196 #if !FULL_SYSTEM
 197     funcExeInst = oldContext->readFuncExeInst();
 198 #endif
 199     inst = oldContext->getInst();
 200 }
 201
 202 void
 203 SimpleThread::serialize(ostream &os)
 204 {
 205     ThreadState::serialize(os);
 206     regs.serialize(os);
 207     // thread_num and cpu_id are deterministic from the config
 208 }
 209
 210
 211 void
 212 SimpleThread::unserialize(Checkpoint *cp, const std::string &section)
 213 {
 214     ThreadState::unserialize(cp, section);
 215     regs.unserialize(cp, section);
 216     // thread_num and cpu_id are deterministic from the config
 217 }
 218
 219 #if FULL_SYSTEM
 220 void
 221 SimpleThread::dumpFuncProfile()
 222 {
 223     std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name()));
 224     profile->dump(tc, *os);
 225 }
 226 #endif
 227
 228 void
 229 SimpleThread::activate(int delay)
 230 {
 231     if (status() == ThreadContext::Active)
 232         return;
 233
 234     lastActivate = curTick;
 235
 236     if (status() == ThreadContext::Unallocated) {
 237         cpu->activateWhenReady(tid);
 238         return;
 239     }
 240
 241     _status = ThreadContext::Active;
 242
 243     // status() == Suspended
 244     cpu->activateContext(tid, delay);
 245 }
 246
 247 void
 248 SimpleThread::suspend()
 249 {
 250     if (status() == ThreadContext::Suspended)
 251         return;
 252
 253     lastActivate = curTick;
 254     lastSuspend = curTick;
 255 /*
 256 #if FULL_SYSTEM
 257     // Don't change the status from active if there are pending interrupts
 258     if (cpu->check_interrupts()) {
 259         assert(status() == ThreadContext::Active);
 260         return;
 261     }
 262 #endif
 263 */
 264     _status = ThreadContext::Suspended;
 265     cpu->suspendContext(tid);
 266 }
 267
 268 void
 269 SimpleThread::deallocate()
 270 {
 271     if (status() == ThreadContext::Unallocated)
 272         return;
 273
 274     _status = ThreadContext::Unallocated;
 275     cpu->deallocateContext(tid);
 276 }
 277
 278 void
 279 SimpleThread::halt()
 280 {
 281     if (status() == ThreadContext::Halted)
 282         return;
 283
 284     _status = ThreadContext::Halted;
 285     cpu->haltContext(tid);
 286 }
 287
 288
 289 void
 290 SimpleThread::regStats(const string &name)
 291 {
 292 #if FULL_SYSTEM
 293     if (kernelStats)
 294         kernelStats->regStats(name + ".kern");
 295 #endif
 296 }
 297
 298 void
 299 SimpleThread::copyArchRegs(ThreadContext *src_tc)
 300 {
 301     TheISA::copyRegs(src_tc, tc);
 302 }
 303
 304 #if FULL_SYSTEM
 305 VirtualPort*
 306 SimpleThread::getVirtPort(ThreadContext *src_tc)
 307 {
 308     if (!src_tc)
 309         return virtPort;
 310
 311     VirtualPort *vp = new VirtualPort("tc-vport", src_tc);
 312     Port *mem_port = getMemFuncPort();
 313
 314     mem_port->setPeer(vp);
 315     vp->setPeer(mem_port);
 316     return vp;
 317 }
 318
 319 void
 320 SimpleThread::delVirtPort(VirtualPort *vp)
 321 {
 322     if (vp != virtPort) {
 323         delete vp->getPeer();
 324         delete vp;
 325     }
 326 }
 327
 328 #endif
 329