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29 #include "cpu/static_inst.hh"
33 #include "sim/core.hh"
37 static TheISA::ExtMachInst nopMachInst
;
39 class NopStaticInst
: public StaticInst
42 NopStaticInst() : StaticInst("gem5 nop", nopMachInst
, No_OpClass
)
46 execute(ExecContext
*xc
, Trace::InstRecord
*traceData
) const override
52 advancePC(TheISA::PCState
&pcState
) const override
58 generateDisassembly(Addr pc
, const SymbolTable
*symtab
) const override
68 StaticInstPtr
StaticInst::nullStaticInstPtr
;
69 StaticInstPtr
StaticInst::nopStaticInstPtr
= new NopStaticInst
;
73 StaticInst::~StaticInst()
75 if (cachedDisassembly
)
76 delete cachedDisassembly
;
80 StaticInst::hasBranchTarget(const TheISA::PCState
&pc
, ThreadContext
*tc
,
81 TheISA::PCState
&tgt
) const
84 tgt
= branchTarget(pc
);
88 if (isIndirectCtrl()) {
89 tgt
= branchTarget(tc
);
97 StaticInst::fetchMicroop(MicroPC upc
) const
99 panic("StaticInst::fetchMicroop() called on instruction "
100 "that is not microcoded.");
104 StaticInst::branchTarget(const TheISA::PCState
&pc
) const
106 panic("StaticInst::branchTarget() called on instruction "
107 "that is not a PC-relative branch.");
112 StaticInst::branchTarget(ThreadContext
*tc
) const
114 panic("StaticInst::branchTarget() called on instruction "
115 "that is not an indirect branch.");
120 StaticInst::disassemble(Addr pc
, const SymbolTable
*symtab
) const
122 if (!cachedDisassembly
)
123 cachedDisassembly
= new string(generateDisassembly(pc
, symtab
));
125 return *cachedDisassembly
;
129 StaticInst::printFlags(std::ostream
&outs
,
130 const std::string
&separator
) const
132 bool printed_a_flag
= false;
134 for (unsigned int flag
= IsNop
; flag
< Num_Flags
; flag
++) {
139 outs
<< FlagsStrings
[flag
];
140 printed_a_flag
= true;