MEM: Move port creation to the memory object(s) construction
[gem5.git] / src / cpu / testers / directedtest / RubyDirectedTester.cc
1 /*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
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8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
15 * Copyright (c) 2009-2010 Advanced Micro Devices, Inc.
16 * All rights reserved.
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40 */
41
42 #include "cpu/testers/directedtest/DirectedGenerator.hh"
43 #include "cpu/testers/directedtest/RubyDirectedTester.hh"
44 #include "debug/DirectedTest.hh"
45 #include "mem/ruby/eventqueue/RubyEventQueue.hh"
46 #include "sim/sim_exit.hh"
47
48 RubyDirectedTester::RubyDirectedTester(const Params *p)
49 : MemObject(p), directedStartEvent(this),
50 m_requests_to_complete(p->requests_to_complete),
51 generator(p->generator)
52 {
53 m_requests_completed = 0;
54
55 // create the ports
56 for (int i = 0; i < p->port_cpuPort_connection_count; ++i) {
57 ports.push_back(new CpuPort(csprintf("%s-port%d", name(), i),
58 this, i));
59 }
60
61 // add the check start event to the event queue
62 schedule(directedStartEvent, 1);
63 }
64
65 RubyDirectedTester::~RubyDirectedTester()
66 {
67 for (int i = 0; i < ports.size(); i++)
68 delete ports[i];
69 }
70
71 void
72 RubyDirectedTester::init()
73 {
74 assert(ports.size() > 0);
75 generator->setDirectedTester(this);
76 }
77
78 Port *
79 RubyDirectedTester::getPort(const std::string &if_name, int idx)
80 {
81 if (if_name != "cpuPort") {
82 panic("RubyDirectedTester::getPort: unknown port %s requested",
83 if_name);
84 }
85
86 if (idx >= static_cast<int>(ports.size())) {
87 panic("RubyDirectedTester::getPort: unknown index %d requested\n", idx);
88 }
89
90 return ports[idx];
91 }
92
93 Tick
94 RubyDirectedTester::CpuPort::recvAtomic(PacketPtr pkt)
95 {
96 panic("RubyDirectedTester::CpuPort::recvAtomic() not implemented!\n");
97 return 0;
98 }
99
100 bool
101 RubyDirectedTester::CpuPort::recvTiming(PacketPtr pkt)
102 {
103 tester->hitCallback(idx, pkt->getAddr());
104
105 //
106 // Now that the tester has completed, delete the packet, then return
107 //
108 delete pkt->req;
109 delete pkt;
110 return true;
111 }
112
113 Port*
114 RubyDirectedTester::getCpuPort(int idx)
115 {
116 assert(idx >= 0 && idx < ports.size());
117
118 return ports[idx];
119 }
120
121 void
122 RubyDirectedTester::hitCallback(NodeID proc, Addr addr)
123 {
124 DPRINTF(DirectedTest,
125 "completed request for proc: %d addr: 0x%x\n",
126 proc,
127 addr);
128
129 generator->performCallback(proc, addr);
130 schedule(directedStartEvent, curTick());
131 }
132
133 void
134 RubyDirectedTester::wakeup()
135 {
136 if (m_requests_completed < m_requests_to_complete) {
137 if (!generator->initiate()) {
138 schedule(directedStartEvent, curTick() + 1);
139 }
140 } else {
141 exitSimLoop("Ruby DirectedTester completed");
142 }
143 }
144
145 RubyDirectedTester *
146 RubyDirectedTesterParams::create()
147 {
148 return new RubyDirectedTester(this);
149 }