1 # Copyright (c) 2010 Advanced Micro Devices, Inc.
4 # Redistribution and use in source and binary forms, with or without
5 # modification, are permitted provided that the following conditions are
6 # met: redistributions of source code must retain the above copyright
7 # notice, this list of conditions and the following disclaimer;
8 # redistributions in binary form must reproduce the above copyright
9 # notice, this list of conditions and the following disclaimer in the
10 # documentation and/or other materials provided with the distribution;
11 # neither the name of the copyright holders nor the names of its
12 # contributors may be used to endorse or promote products derived from
13 # this software without specific prior written permission.
15 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 # Authors: Brad Beckmann
29 from m5
.SimObject
import SimObject
30 from MemObject
import MemObject
31 from m5
.params
import *
32 from m5
.proxy
import *
34 class DirectedGenerator(SimObject
):
35 type = 'DirectedGenerator'
37 cxx_header
= "cpu/testers/directedtest/DirectedGenerator.hh"
38 num_cpus
= Param
.Int("num of cpus")
39 system
= Param
.System(Parent
.any
, "System we belong to")
41 class SeriesRequestGenerator(DirectedGenerator
):
42 type = 'SeriesRequestGenerator'
43 cxx_header
= "cpu/testers/directedtest/SeriesRequestGenerator.hh"
44 addr_increment_size
= Param
.Int(64, "address increment size")
45 issue_writes
= Param
.Bool(True, "issue writes if true, otherwise reads")
47 class InvalidateGenerator(DirectedGenerator
):
48 type = 'InvalidateGenerator'
49 cxx_header
= "cpu/testers/directedtest/InvalidateGenerator.hh"
50 addr_increment_size
= Param
.Int(64, "address increment size")
52 class RubyDirectedTester(MemObject
):
53 type = 'RubyDirectedTester'
54 cxx_header
= "cpu/testers/directedtest/RubyDirectedTester.hh"
55 cpuPort
= VectorMasterPort("the cpu ports")
56 requests_to_complete
= Param
.Int("checks to complete")
57 generator
= Param
.DirectedGenerator("the request generator")