src/cpu/testers/directedtest/SeriesRequestGenerator.cc

   1 /*
   2  * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
   3  * Copyright (c) 2009-2010 Advanced Micro Devices, Inc.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are
   8  * met: redistributions of source code must retain the above copyright
   9  * notice, this list of conditions and the following disclaimer;
  10  * redistributions in binary form must reproduce the above copyright
  11  * notice, this list of conditions and the following disclaimer in the
  12  * documentation and/or other materials provided with the distribution;
  13  * neither the name of the copyright holders nor the names of its
  14  * contributors may be used to endorse or promote products derived from
  15  * this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  */
  29
  30 #include "cpu/testers/directedtest/SeriesRequestGenerator.hh"
  31
  32 #include "base/random.hh"
  33 #include "base/trace.hh"
  34 #include "cpu/testers/directedtest/DirectedGenerator.hh"
  35 #include "cpu/testers/directedtest/RubyDirectedTester.hh"
  36 #include "debug/DirectedTest.hh"
  37
  38 SeriesRequestGenerator::SeriesRequestGenerator(const Params *p)
  39     : DirectedGenerator(p),
  40       m_addr_increment_size(p->addr_increment_size),
  41       m_percent_writes(p->percent_writes)
  42 {
  43     m_status = SeriesRequestGeneratorStatus_Thinking;
  44     m_active_node = 0;
  45     m_address = 0x0;
  46 }
  47
  48 SeriesRequestGenerator::~SeriesRequestGenerator()
  49 {
  50 }
  51
  52 bool
  53 SeriesRequestGenerator::initiate()
  54 {
  55     DPRINTF(DirectedTest, "initiating request\n");
  56     assert(m_status == SeriesRequestGeneratorStatus_Thinking);
  57
  58     RequestPort* port = m_directed_tester->getCpuPort(m_active_node);
  59
  60     Request::Flags flags;
  61
  62     // For simplicity, requests are assumed to be 1 byte-sized
  63     RequestPtr req = std::make_shared<Request>(m_address, 1, flags,
  64                                                requestorId);
  65
  66     Packet::Command cmd;
  67     bool do_write = (random_mt.random(0, 100) < m_percent_writes);
  68     if (do_write) {
  69         cmd = MemCmd::WriteReq;
  70     } else {
  71         cmd = MemCmd::ReadReq;
  72     }
  73
  74     PacketPtr pkt = new Packet(req, cmd);
  75     pkt->allocate();
  76
  77     if (port->sendTimingReq(pkt)) {
  78         DPRINTF(DirectedTest, "initiating request - successful\n");
  79         m_status = SeriesRequestGeneratorStatus_Request_Pending;
  80         return true;
  81     } else {
  82         // If the packet did not issue, must delete
  83         // Note: No need to delete the data, the packet destructor
  84         // will delete it
  85         delete pkt;
  86
  87         DPRINTF(DirectedTest, "failed to initiate request - sequencer not ready\n");
  88         return false;
  89     }
  90 }
  91
  92 void
  93 SeriesRequestGenerator::performCallback(uint32_t proc, Addr address)
  94 {
  95     assert(m_active_node == proc);
  96     assert(m_address == address);
  97     assert(m_status == SeriesRequestGeneratorStatus_Request_Pending);
  98
  99     m_status = SeriesRequestGeneratorStatus_Thinking;
 100     m_active_node++;
 101     if (m_active_node == m_num_cpus) {
 102         //
 103         // Cycle of requests completed, increment cycle completions and restart
 104         // at cpu zero
 105         //
 106         m_directed_tester->incrementCycleCompletions();
 107         m_address += m_addr_increment_size;
 108         m_active_node = 0;
 109     }
 110 }
 111
 112 SeriesRequestGenerator *
 113 SeriesRequestGeneratorParams::create()
 114 {
 115     return new SeriesRequestGenerator(this);
 116 }