mem: Set the cache line size on a system level
[gem5.git] / src / cpu / testers / networktest / networktest.cc
1 /*
2 * Copyright (c) 2009 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Tushar Krishna
29 */
30
31 #include <cmath>
32 #include <iomanip>
33 #include <set>
34 #include <string>
35 #include <vector>
36
37 #include "base/misc.hh"
38 #include "base/statistics.hh"
39 #include "cpu/testers/networktest/networktest.hh"
40 #include "debug/NetworkTest.hh"
41 #include "mem/mem_object.hh"
42 #include "mem/packet.hh"
43 #include "mem/port.hh"
44 #include "mem/request.hh"
45 #include "sim/sim_events.hh"
46 #include "sim/stats.hh"
47 #include "sim/system.hh"
48
49 using namespace std;
50
51 int TESTER_NETWORK=0;
52
53 bool
54 NetworkTest::CpuPort::recvTimingResp(PacketPtr pkt)
55 {
56 networktest->completeRequest(pkt);
57 return true;
58 }
59
60 void
61 NetworkTest::CpuPort::recvRetry()
62 {
63 networktest->doRetry();
64 }
65
66 void
67 NetworkTest::sendPkt(PacketPtr pkt)
68 {
69 if (!cachePort.sendTimingReq(pkt)) {
70 retryPkt = pkt; // RubyPort will retry sending
71 }
72 numPacketsSent++;
73 }
74
75 NetworkTest::NetworkTest(const Params *p)
76 : MemObject(p),
77 tickEvent(this),
78 cachePort("network-test", this),
79 retryPkt(NULL),
80 size(p->memory_size),
81 blockSizeBits(p->block_offset),
82 numMemories(p->num_memories),
83 simCycles(p->sim_cycles),
84 fixedPkts(p->fixed_pkts),
85 maxPackets(p->max_packets),
86 trafficType(p->traffic_type),
87 injRate(p->inj_rate),
88 precision(p->precision),
89 masterId(p->system->getMasterId(name()))
90 {
91 // set up counters
92 noResponseCycles = 0;
93 schedule(tickEvent, 0);
94
95 id = TESTER_NETWORK++;
96 DPRINTF(NetworkTest,"Config Created: Name = %s , and id = %d\n",
97 name(), id);
98 }
99
100 BaseMasterPort &
101 NetworkTest::getMasterPort(const std::string &if_name, PortID idx)
102 {
103 if (if_name == "test")
104 return cachePort;
105 else
106 return MemObject::getMasterPort(if_name, idx);
107 }
108
109 void
110 NetworkTest::init()
111 {
112 numPacketsSent = 0;
113 }
114
115
116 void
117 NetworkTest::completeRequest(PacketPtr pkt)
118 {
119 Request *req = pkt->req;
120
121 DPRINTF(NetworkTest, "Completed injection of %s packet for address %x\n",
122 pkt->isWrite() ? "write" : "read\n",
123 req->getPaddr());
124
125 assert(pkt->isResponse());
126 noResponseCycles = 0;
127 delete req;
128 delete pkt;
129 }
130
131
132 void
133 NetworkTest::tick()
134 {
135 if (++noResponseCycles >= 500000) {
136 cerr << name() << ": deadlocked at cycle " << curTick() << endl;
137 fatal("");
138 }
139
140 // make new request based on injection rate
141 // (injection rate's range depends on precision)
142 // - generate a random number between 0 and 10^precision
143 // - send pkt if this number is < injRate*(10^precision)
144 bool send_this_cycle;
145 double injRange = pow((double) 10, (double) precision);
146 unsigned trySending = random() % (int) injRange;
147 if (trySending < injRate*injRange)
148 send_this_cycle = true;
149 else
150 send_this_cycle = false;
151
152 // always generatePkt unless fixedPkts is enabled
153 if (send_this_cycle) {
154 if (fixedPkts) {
155 if (numPacketsSent < maxPackets) {
156 generatePkt();
157 }
158 } else {
159 generatePkt();
160 }
161 }
162
163 // Schedule wakeup
164 if (curTick() >= simCycles)
165 exitSimLoop("Network Tester completed simCycles");
166 else {
167 if (!tickEvent.scheduled())
168 schedule(tickEvent, clockEdge(Cycles(1)));
169 }
170 }
171
172 void
173 NetworkTest::generatePkt()
174 {
175 unsigned destination = id;
176 if (trafficType == 0) { // Uniform Random
177 destination = random() % numMemories;
178 } else if (trafficType == 1) { // Tornado
179 int networkDimension = (int) sqrt(numMemories);
180 int my_x = id%networkDimension;
181 int my_y = id/networkDimension;
182
183 int dest_x = my_x + (int) ceil(networkDimension/2) - 1;
184 dest_x = dest_x%networkDimension;
185 int dest_y = my_y;
186
187 destination = dest_y*networkDimension + dest_x;
188 } else if (trafficType == 2) { // Bit Complement
189 int networkDimension = (int) sqrt(numMemories);
190 int my_x = id%networkDimension;
191 int my_y = id/networkDimension;
192
193 int dest_x = networkDimension - my_x - 1;
194 int dest_y = networkDimension - my_y - 1;
195
196 destination = dest_y*networkDimension + dest_x;
197 }
198
199 Request *req = new Request();
200 Request::Flags flags;
201
202 // The source of the packets is a cache.
203 // The destination of the packets is a directory.
204 // The destination bits are embedded in the address after byte-offset.
205 Addr paddr = destination;
206 paddr <<= blockSizeBits;
207 unsigned access_size = 1; // Does not affect Ruby simulation
208
209 // Modeling different coherence msg types over different msg classes.
210 //
211 // networktest assumes the Network_test coherence protocol
212 // which models three message classes/virtual networks.
213 // These are: request, forward, response.
214 // requests and forwards are "control" packets (typically 8 bytes),
215 // while responses are "data" packets (typically 72 bytes).
216 //
217 // Life of a packet from the tester into the network:
218 // (1) This function generatePkt() generates packets of one of the
219 // following 3 types (randomly) : ReadReq, INST_FETCH, WriteReq
220 // (2) mem/ruby/system/RubyPort.cc converts these to RubyRequestType_LD,
221 // RubyRequestType_IFETCH, RubyRequestType_ST respectively
222 // (3) mem/ruby/system/Sequencer.cc sends these to the cache controllers
223 // in the coherence protocol.
224 // (4) Network_test-cache.sm tags RubyRequestType:LD,
225 // RubyRequestType:IFETCH and RubyRequestType:ST as
226 // Request, Forward, and Response events respectively;
227 // and injects them into virtual networks 0, 1 and 2 respectively.
228 // It immediately calls back the sequencer.
229 // (5) The packet traverses the network (simple/garnet) and reaches its
230 // destination (Directory), and network stats are updated.
231 // (6) Network_test-dir.sm simply drops the packet.
232 //
233 MemCmd::Command requestType;
234
235 unsigned randomReqType = random() % 3;
236 if (randomReqType == 0) {
237 // generate packet for virtual network 0
238 requestType = MemCmd::ReadReq;
239 req->setPhys(paddr, access_size, flags, masterId);
240 } else if (randomReqType == 1) {
241 // generate packet for virtual network 1
242 requestType = MemCmd::ReadReq;
243 flags.set(Request::INST_FETCH);
244 req->setVirt(0, 0x0, access_size, flags, 0x0, masterId);
245 req->setPaddr(paddr);
246 } else { // if (randomReqType == 2)
247 // generate packet for virtual network 2
248 requestType = MemCmd::WriteReq;
249 req->setPhys(paddr, access_size, flags, masterId);
250 }
251
252 req->setThreadContext(id,0);
253
254 //No need to do functional simulation
255 //We just do timing simulation of the network
256
257 DPRINTF(NetworkTest,
258 "Generated packet with destination %d, embedded in address %x\n",
259 destination, req->getPaddr());
260
261 PacketPtr pkt = new Packet(req, requestType);
262 pkt->dataDynamicArray(new uint8_t[req->getSize()]);
263 pkt->senderState = NULL;
264
265 sendPkt(pkt);
266 }
267
268 void
269 NetworkTest::doRetry()
270 {
271 if (cachePort.sendTimingReq(retryPkt)) {
272 retryPkt = NULL;
273 }
274 }
275
276 void
277 NetworkTest::printAddr(Addr a)
278 {
279 cachePort.printAddr(a);
280 }
281
282
283 NetworkTest *
284 NetworkTestParams::create()
285 {
286 return new NetworkTest(this);
287 }