src/cpu/testers/traffic_gen/base_gen.cc

   1 /*
   2  * Copyright (c) 2012-2013, 2016-2018 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed here under.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
  16  * met: redistributions of source code must retain the above copyright
  17  * notice, this list of conditions and the following disclaimer;
  18  * redistributions in binary form must reproduce the above copyright
  19  * notice, this list of conditions and the following disclaimer in the
  20  * documentation and/or other materials provided with the distribution;
  21  * neither the name of the copyright holders nor the names of its
  22  * contributors may be used to endorse or promote products derived from
  23  * this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 #include "cpu/testers/traffic_gen/base_gen.hh"
  39
  40 #include <algorithm>
  41
  42 #include "base/logging.hh"
  43 #include "base/random.hh"
  44 #include "base/trace.hh"
  45 #include "cpu/testers/traffic_gen/base.hh"
  46 #include "debug/TrafficGen.hh"
  47 #include "sim/system.hh"
  48
  49 BaseGen::BaseGen(SimObject &obj, MasterID master_id, Tick _duration)
  50     : _name(obj.name()), masterID(master_id),
  51       duration(_duration)
  52 {
  53 }
  54
  55 PacketPtr
  56 BaseGen::getPacket(Addr addr, unsigned size, const MemCmd& cmd,
  57                    Request::FlagsType flags)
  58 {
  59     // Create new request
  60     RequestPtr req = std::make_shared<Request>(addr, size, flags, masterID);
  61     // Dummy PC to have PC-based prefetchers latch on; get entropy into higher
  62     // bits
  63     req->setPC(((Addr)masterID) << 2);
  64
  65     // Embed it in a packet
  66     PacketPtr pkt = new Packet(req, cmd);
  67
  68     uint8_t* pkt_data = new uint8_t[req->getSize()];
  69     pkt->dataDynamic(pkt_data);
  70
  71     if (cmd.isWrite()) {
  72         std::fill_n(pkt_data, req->getSize(), (uint8_t)masterID);
  73     }
  74
  75     return pkt;
  76 }
  77
  78 StochasticGen::StochasticGen(SimObject &obj,
  79                              MasterID master_id, Tick _duration,
  80                              Addr start_addr, Addr end_addr,
  81                              Addr _blocksize, Addr cacheline_size,
  82                              Tick min_period, Tick max_period,
  83                              uint8_t read_percent, Addr data_limit)
  84         : BaseGen(obj, master_id, _duration),
  85           startAddr(start_addr), endAddr(end_addr),
  86           blocksize(_blocksize), cacheLineSize(cacheline_size),
  87           minPeriod(min_period), maxPeriod(max_period),
  88           readPercent(read_percent), dataLimit(data_limit)
  89 {
  90     if (blocksize > cacheLineSize)
  91         fatal("TrafficGen %s block size (%d) is larger than "
  92               "cache line size (%d)\n", name(),
  93               blocksize, cacheLineSize);
  94
  95     if (read_percent > 100)
  96         fatal("%s cannot have more than 100% reads", name());
  97
  98     if (min_period > max_period)
  99         fatal("%s cannot have min_period > max_period", name());
 100 }