src/cpu/testers/traffic_gen/base_gen.hh

   1 /*
   2  * Copyright (c) 2012-2013, 2017-2018 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
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   8  * to a hardware implementation of the functionality of the software
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  10  * terms below provided that you ensure that this notice is replicated
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  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
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  23  * this software without specific prior written permission.
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  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 /**
  39  * @file
  40  * Declaration of the base generator class for all generators.
  41  */
  42
  43 #ifndef __CPU_TRAFFIC_GEN_BASE_GEN_HH__
  44 #define __CPU_TRAFFIC_GEN_BASE_GEN_HH__
  45
  46 #include "base/bitfield.hh"
  47 #include "base/intmath.hh"
  48 #include "mem/packet.hh"
  49
  50 class BaseTrafficGen;
  51
  52 /**
  53  * Base class for all generators, with the shared functionality and
  54  * virtual functions for entering, executing and leaving the
  55  * generator.
  56  */
  57 class BaseGen
  58 {
  59
  60   protected:
  61
  62     /** Name to use for status and debug printing */
  63     const std::string _name;
  64
  65     /** The RequestorID used for generating requests */
  66     const RequestorID requestorId;
  67
  68     /**
  69      * Generate a new request and associated packet
  70      *
  71      * @param addr Physical address to use
  72      * @param size Size of the request
  73      * @param cmd Memory command to send
  74      * @param flags Optional request flags
  75      */
  76     PacketPtr getPacket(Addr addr, unsigned size, const MemCmd& cmd,
  77                         Request::FlagsType flags = 0);
  78
  79   public:
  80
  81     /** Time to spend in this state */
  82     const Tick duration;
  83
  84     /**
  85      * Create a base generator.
  86      *
  87      * @param obj simobject owning the generator
  88      * @param requestor_id RequestorID set on each request
  89      * @param _duration duration of this state before transitioning
  90      */
  91     BaseGen(SimObject &obj, RequestorID requestor_id, Tick _duration);
  92
  93     virtual ~BaseGen() { }
  94
  95     /**
  96      * Get the name, useful for DPRINTFs.
  97      *
  98      * @return the given name
  99      */
 100     std::string name() const { return _name; }
 101
 102     /**
 103      * Enter this generator state.
 104      */
 105     virtual void enter() = 0;
 106
 107     /**
 108      * Get the next generated packet.
 109      *
 110      * @return A packet to be sent at the current tick
 111      */
 112     virtual PacketPtr getNextPacket() = 0;
 113
 114     /**
 115      * Exit this generator state. By default do nothing.
 116      */
 117     virtual void exit() { };
 118
 119     /**
 120      * Determine the tick when the next packet is available. MaxTick
 121      * means that there will not be any further packets in the current
 122      * activation cycle of the generator.
 123      *
 124      * @param elastic should the injection respond to flow control or not
 125      * @param delay time the previous packet spent waiting
 126      * @return next tick when a packet is available
 127      */
 128     virtual Tick nextPacketTick(bool elastic, Tick delay) const = 0;
 129
 130 };
 131
 132 class StochasticGen : public BaseGen
 133 {
 134   public:
 135     StochasticGen(SimObject &obj,
 136                   RequestorID requestor_id, Tick _duration,
 137                   Addr start_addr, Addr end_addr,
 138                   Addr _blocksize, Addr cacheline_size,
 139                   Tick min_period, Tick max_period,
 140                   uint8_t read_percent, Addr data_limit);
 141
 142   protected:
 143     /** Start of address range */
 144     const Addr startAddr;
 145
 146     /** End of address range */
 147     const Addr endAddr;
 148
 149     /** Blocksize and address increment */
 150     const Addr blocksize;
 151
 152     /** Cache line size in the simulated system */
 153     const Addr cacheLineSize;
 154
 155     /** Request generation period */
 156     const Tick minPeriod;
 157     const Tick maxPeriod;
 158
 159     /**
 160      * Percent of generated transactions that should be reads
 161      */
 162     const uint8_t readPercent;
 163
 164     /** Maximum amount of data to manipulate */
 165     const Addr dataLimit;
 166 };
 167
 168 #endif