src/cpu/testers/traffic_gen/dram_rot_gen.cc

   1 /*
   2  * Copyright (c) 2012-2013, 2016-2017, 2019 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
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   8  * to a hardware implementation of the functionality of the software
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  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
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  19  * notice, this list of conditions and the following disclaimer in the
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  21  * neither the name of the copyright holders nor the names of its
  22  * contributors may be used to endorse or promote products derived from
  23  * this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  *
  37  * Authors: Thomas Grass
  38  *          Andreas Hansson
  39  *          Sascha Bischoff
  40  *          Neha Agarwal
  41  */
  42
  43 #include "cpu/testers/traffic_gen/dram_rot_gen.hh"
  44
  45 #include <algorithm>
  46
  47 #include "base/random.hh"
  48 #include "base/trace.hh"
  49 #include "debug/TrafficGen.hh"
  50 #include "enums/AddrMap.hh"
  51
  52 PacketPtr
  53 DramRotGen::getNextPacket()
  54 {
  55     // if this is the first of the packets in series to be generated,
  56     // start counting again
  57     if (countNumSeqPkts == 0) {
  58         countNumSeqPkts = numSeqPkts;
  59
  60         // choose if we generate a read or a write here
  61         if (readPercent == 50) {
  62            if ((nextSeqCount % nbrOfBanksUtil) == 0) {
  63                // Change type after all banks have been rotated
  64                // Otherwise, keep current value
  65                isRead = !isRead;
  66            }
  67         } else {
  68            // Set randomly based on percentage
  69            isRead = readPercent != 0;
  70         }
  71
  72         assert((readPercent == 0 && !isRead) ||
  73                (readPercent == 100 && isRead) ||
  74                readPercent != 100);
  75
  76          // Overwrite random bank value
  77          // Rotate across banks
  78          unsigned int new_bank = nextSeqCount % nbrOfBanksUtil;
  79
  80          // Overwrite random rank value
  81          // Will rotate to the next rank after rotating through all banks,
  82          // for each specified command type.
  83
  84          // Use modular function to ensure that calculated rank is within
  85          // system limits after state transition
  86          unsigned int new_rank = (nextSeqCount / maxSeqCountPerRank) %
  87              nbrOfRanks;
  88
  89          // Increment nextSeqCount
  90          // Roll back to 0 after completing a full rotation across
  91          // banks, command type, and ranks
  92          nextSeqCount = (nextSeqCount + 1) %
  93              (nbrOfRanks * maxSeqCountPerRank);
  94
  95          DPRINTF(TrafficGen, "DramRotGen::getNextPacket nextSeqCount: %d "
  96                  "new_rank: %d  new_bank: %d\n",
  97                  nextSeqCount, new_rank, new_bank);
  98
  99         // Generate the start address of the command series
 100         // routine will update addr variable with bank, rank, and col
 101         // bits updated for rotation scheme
 102         genStartAddr(new_bank, new_rank);
 103
 104     } else {
 105         // increment the column by one
 106         if (addrMapping == Enums::RoRaBaCoCh ||
 107             addrMapping == Enums::RoRaBaChCo)
 108             // Simply increment addr by blocksize to
 109             // increment the column by one
 110             addr += blocksize;
 111
 112         else if (addrMapping ==  Enums::RoCoRaBaCh) {
 113             // Explicity increment the column bits
 114
 115                     unsigned int new_col = ((addr / blocksize /
 116                                       nbrOfBanksDRAM / nbrOfRanks) %
 117                                       (pageSize / blocksize)) + 1;
 118             replaceBits(addr, blockBits + bankBits + rankBits + pageBits - 1,
 119                         blockBits + bankBits + rankBits, new_col);
 120         }
 121     }
 122
 123     DPRINTF(TrafficGen, "DramRotGen::getNextPacket: %c to addr %x, "
 124             "size %d, countNumSeqPkts: %d, numSeqPkts: %d\n",
 125             isRead ? 'r' : 'w', addr, blocksize, countNumSeqPkts, numSeqPkts);
 126
 127     // create a new request packet
 128     PacketPtr pkt = getPacket(addr, blocksize,
 129                               isRead ? MemCmd::ReadReq : MemCmd::WriteReq);
 130
 131     // add the amount of data manipulated to the total
 132     dataManipulated += blocksize;
 133
 134     // subtract the number of packets remained to be generated
 135     --countNumSeqPkts;
 136
 137     // return the generated packet
 138     return pkt;
 139 }