2 * Copyright (c) 2012-2013, 2016-2017 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 * Authors: Thomas Grass
42 #ifndef __CPU_TRAFFIC_GEN_TRAFFIC_GEN_HH__
43 #define __CPU_TRAFFIC_GEN_TRAFFIC_GEN_HH__
45 #include <unordered_map>
47 #include "base/statistics.hh"
48 #include "cpu/testers/traffic_gen/base_gen.hh"
49 #include "cpu/testers/traffic_gen/dram_gen.hh"
50 #include "cpu/testers/traffic_gen/dram_rot_gen.hh"
51 #include "cpu/testers/traffic_gen/exit_gen.hh"
52 #include "cpu/testers/traffic_gen/idle_gen.hh"
53 #include "cpu/testers/traffic_gen/linear_gen.hh"
54 #include "cpu/testers/traffic_gen/random_gen.hh"
55 #include "cpu/testers/traffic_gen/trace_gen.hh"
56 #include "mem/mem_object.hh"
57 #include "mem/qport.hh"
58 #include "params/TrafficGen.hh"
61 * The traffic generator is a master module that generates stimuli for
62 * the memory system, based on a collection of simple generator
63 * behaviours that are either probabilistic or based on traces. It can
64 * be used stand alone for creating test cases for interconnect and
65 * memory controllers, or function as a black box replacement for
66 * system components that are not yet modelled in detail, e.g. a video
67 * engine or baseband subsystem.
69 class TrafficGen : public MemObject
75 * Determine next state and perform the transition.
82 * @param newState identifier of state to enter
84 void enterState(uint32_t newState);
87 * Resolve a file path in the configuration file.
89 * This method resolves a relative path to a file that has been
90 * referenced in the configuration file. It first tries to resolve
91 * the file relative to the configuration file's path. If that
92 * fails, it falls back to constructing a path relative to the
93 * current working directory.
95 * Absolute paths are returned unmodified.
97 * @param name Path to resolve
99 std::string resolveFile(const std::string &name);
102 * Parse the config file and build the state map and
108 * Schedules event for next update and executes an update on the
109 * state graph, either performing a state transition or executing
110 * the current state, depending on the current time.
115 * Receive a retry from the neighbouring port and attempt to
116 * resend the waiting packet.
121 * Method to inform the user we have made no progress.
125 /** Struct to represent a probabilistic transition during parsing. */
133 * The system used to determine which mode we are currently operating
139 * MasterID used in generated requests.
144 * The config file to parse.
146 const std::string configFile;
149 * Determine whether to add elasticity in the request injection,
150 * thus responding to backpressure by slowing things down.
152 const bool elasticReq;
155 * Time to tolerate waiting for retries (not making progress),
156 * until we declare things broken.
158 const Tick progressCheck;
161 * Event to keep track of our progress, or lack thereof.
163 EventFunctionWrapper noProgressEvent;
165 /** Time of next transition */
166 Tick nextTransitionTick;
168 /** Time of the next packet. */
171 /** State transition matrix */
172 std::vector<std::vector<double> > transitionMatrix;
174 /** Index of the current state */
177 /** Map of generator states */
178 std::unordered_map<uint32_t, BaseGen*> states;
180 /** Master port specialisation for the traffic generator */
181 class TrafficGenPort : public MasterPort
185 TrafficGenPort(const std::string& name, TrafficGen& traffic_gen)
186 : MasterPort(name, &traffic_gen), trafficGen(traffic_gen)
191 void recvReqRetry() { trafficGen.recvReqRetry(); }
193 bool recvTimingResp(PacketPtr pkt);
195 void recvTimingSnoopReq(PacketPtr pkt) { }
197 void recvFunctionalSnoop(PacketPtr pkt) { }
199 Tick recvAtomicSnoop(PacketPtr pkt) { return 0; }
203 TrafficGen& trafficGen;
207 /** The instance of master port used by the traffic generator. */
210 /** Packet waiting to be sent. */
213 /** Tick when the stalled packet was meant to be sent. */
216 /** Event for scheduling updates */
217 EventFunctionWrapper updateEvent;
219 uint64_t numSuppressed;
221 /** Count the number of generated packets. */
222 Stats::Scalar numPackets;
224 /** Count the number of retries. */
225 Stats::Scalar numRetries;
227 /** Count the time incurred from back-pressure. */
228 Stats::Scalar retryTicks;
232 TrafficGen(const TrafficGenParams* p);
236 BaseMasterPort& getMasterPort(const std::string &if_name,
237 PortID idx = InvalidPortID) override;
239 void init() override;
241 void initState() override;
243 DrainState drain() override;
245 void serialize(CheckpointOut &cp) const override;
246 void unserialize(CheckpointIn &cp) override;
248 /** Register statistics */
249 void regStats() override;
253 #endif //__CPU_TRAFFIC_GEN_TRAFFIC_GEN_HH__