7953b53c85e861d9fbb67ef893f01bd6463d61e5
[gem5.git] / src / cpu / thread_state.cc
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31 #include "arch/kernel_stats.hh"
32 #include "base/output.hh"
33 #include "cpu/base.hh"
34 #include "cpu/profile.hh"
35 #include "cpu/quiesce_event.hh"
36 #include "cpu/thread_state.hh"
37 #include "mem/fs_translating_port_proxy.hh"
38 #include "mem/port.hh"
39 #include "mem/port_proxy.hh"
40 #include "mem/se_translating_port_proxy.hh"
41 #include "sim/full_system.hh"
42 #include "sim/serialize.hh"
43 #include "sim/system.hh"
44
45 ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
46 : numInst(0), numOp(0), numLoad(0), _status(ThreadContext::Halted),
47 baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0),
48 profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
49 kernelStats(NULL), process(_process), physProxy(NULL), virtProxy(NULL),
50 proxy(NULL), funcExeInst(0), storeCondFailures(0)
51 {
52 }
53
54 ThreadState::~ThreadState()
55 {
56 if (physProxy != NULL)
57 delete physProxy;
58 if (virtProxy != NULL)
59 delete virtProxy;
60 if (proxy != NULL)
61 delete proxy;
62 }
63
64 void
65 ThreadState::serialize(std::ostream &os)
66 {
67 SERIALIZE_ENUM(_status);
68 // thread_num and cpu_id are deterministic from the config
69 SERIALIZE_SCALAR(funcExeInst);
70
71 if (!FullSystem)
72 return;
73
74 Tick quiesceEndTick = 0;
75 if (quiesceEvent->scheduled())
76 quiesceEndTick = quiesceEvent->when();
77 SERIALIZE_SCALAR(quiesceEndTick);
78 if (kernelStats)
79 kernelStats->serialize(os);
80 }
81
82 void
83 ThreadState::unserialize(Checkpoint *cp, const std::string &section)
84 {
85
86 UNSERIALIZE_ENUM(_status);
87 // thread_num and cpu_id are deterministic from the config
88 UNSERIALIZE_SCALAR(funcExeInst);
89
90 if (!FullSystem)
91 return;
92
93 Tick quiesceEndTick;
94 UNSERIALIZE_SCALAR(quiesceEndTick);
95 if (quiesceEndTick)
96 baseCpu->schedule(quiesceEvent, quiesceEndTick);
97 if (kernelStats)
98 kernelStats->unserialize(cp, section);
99 }
100
101 void
102 ThreadState::initMemProxies(ThreadContext *tc)
103 {
104 // The port proxies only refer to the data port on the CPU side
105 // and can safely be done at init() time even if the CPU is not
106 // connected, i.e. when restoring from a checkpoint and later
107 // switching the CPU in.
108 if (FullSystem) {
109 assert(physProxy == NULL);
110 // This cannot be done in the constructor as the thread state
111 // itself is created in the base cpu constructor and the
112 // getDataPort is a virtual function
113 physProxy = new PortProxy(baseCpu->getDataPort(),
114 baseCpu->cacheLineSize());
115
116 assert(virtProxy == NULL);
117 virtProxy = new FSTranslatingPortProxy(tc);
118 } else {
119 assert(proxy == NULL);
120 proxy = new SETranslatingPortProxy(baseCpu->getDataPort(),
121 process,
122 SETranslatingPortProxy::NextPage);
123 }
124 }
125
126 PortProxy &
127 ThreadState::getPhysProxy()
128 {
129 assert(FullSystem);
130 assert(physProxy != NULL);
131 return *physProxy;
132 }
133
134 FSTranslatingPortProxy &
135 ThreadState::getVirtProxy()
136 {
137 assert(FullSystem);
138 assert(virtProxy != NULL);
139 return *virtProxy;
140 }
141
142 SETranslatingPortProxy &
143 ThreadState::getMemProxy()
144 {
145 assert(!FullSystem);
146 assert(proxy != NULL);
147 return *proxy;
148 }
149
150 void
151 ThreadState::profileClear()
152 {
153 if (profile)
154 profile->clear();
155 }
156
157 void
158 ThreadState::profileSample()
159 {
160 if (profile)
161 profile->sample(profileNode, profilePC);
162 }