src/cpu/thread_state.cc

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  */
  30
  31 #include "cpu/thread_state.hh"
  32
  33 #include "arch/kernel_stats.hh"
  34 #include "base/output.hh"
  35 #include "cpu/base.hh"
  36 #include "cpu/profile.hh"
  37 #include "cpu/quiesce_event.hh"
  38 #include "mem/fs_translating_port_proxy.hh"
  39 #include "mem/port.hh"
  40 #include "mem/port_proxy.hh"
  41 #include "mem/se_translating_port_proxy.hh"
  42 #include "sim/full_system.hh"
  43 #include "sim/serialize.hh"
  44 #include "sim/system.hh"
  45
  46 ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
  47     : numInst(0), numOp(0), numLoad(0), startNumLoad(0),
  48       _status(ThreadContext::Halted), baseCpu(cpu),
  49       _contextId(0), _threadId(_tid), lastActivate(0), lastSuspend(0),
  50       profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
  51       kernelStats(NULL), process(_process), physProxy(NULL), virtProxy(NULL),
  52       proxy(NULL), funcExeInst(0), storeCondFailures(0)
  53 {
  54 }
  55
  56 ThreadState::~ThreadState()
  57 {
  58     if (physProxy != NULL)
  59         delete physProxy;
  60     if (virtProxy != NULL)
  61         delete virtProxy;
  62     if (proxy != NULL)
  63         delete proxy;
  64 }
  65
  66 void
  67 ThreadState::serialize(CheckpointOut &cp) const
  68 {
  69     SERIALIZE_ENUM(_status);
  70     // thread_num and cpu_id are deterministic from the config
  71     SERIALIZE_SCALAR(funcExeInst);
  72
  73     if (!FullSystem)
  74         return;
  75
  76     Tick quiesceEndTick = 0;
  77     if (quiesceEvent->scheduled())
  78         quiesceEndTick = quiesceEvent->when();
  79     SERIALIZE_SCALAR(quiesceEndTick);
  80     if (kernelStats)
  81         kernelStats->serialize(cp);
  82 }
  83
  84 void
  85 ThreadState::unserialize(CheckpointIn &cp)
  86 {
  87
  88     UNSERIALIZE_ENUM(_status);
  89     // thread_num and cpu_id are deterministic from the config
  90     UNSERIALIZE_SCALAR(funcExeInst);
  91
  92     if (!FullSystem)
  93         return;
  94
  95     Tick quiesceEndTick;
  96     UNSERIALIZE_SCALAR(quiesceEndTick);
  97     if (quiesceEndTick)
  98         baseCpu->schedule(quiesceEvent, quiesceEndTick);
  99     if (kernelStats)
 100         kernelStats->unserialize(cp);
 101 }
 102
 103 void
 104 ThreadState::initMemProxies(ThreadContext *tc)
 105 {
 106     // The port proxies only refer to the data port on the CPU side
 107     // and can safely be done at init() time even if the CPU is not
 108     // connected, i.e. when restoring from a checkpoint and later
 109     // switching the CPU in.
 110     if (FullSystem) {
 111         assert(physProxy == NULL);
 112         // This cannot be done in the constructor as the thread state
 113         // itself is created in the base cpu constructor and the
 114         // getDataPort is a virtual function
 115         physProxy = new PortProxy(baseCpu->getDataPort(),
 116                                   baseCpu->cacheLineSize());
 117
 118         assert(virtProxy == NULL);
 119         virtProxy = new FSTranslatingPortProxy(tc);
 120     } else {
 121         assert(proxy == NULL);
 122         proxy = new SETranslatingPortProxy(baseCpu->getDataPort(),
 123                                            process,
 124                                            SETranslatingPortProxy::NextPage);
 125     }
 126 }
 127
 128 PortProxy &
 129 ThreadState::getPhysProxy()
 130 {
 131     assert(FullSystem);
 132     assert(physProxy != NULL);
 133     return *physProxy;
 134 }
 135
 136 FSTranslatingPortProxy &
 137 ThreadState::getVirtProxy()
 138 {
 139     assert(FullSystem);
 140     assert(virtProxy != NULL);
 141     return *virtProxy;
 142 }
 143
 144 SETranslatingPortProxy &
 145 ThreadState::getMemProxy()
 146 {
 147     assert(!FullSystem);
 148     assert(proxy != NULL);
 149     return *proxy;
 150 }
 151
 152 void
 153 ThreadState::profileClear()
 154 {
 155     if (profile)
 156         profile->clear();
 157 }
 158
 159 void
 160 ThreadState::profileSample()
 161 {
 162     if (profile)
 163         profile->sample(profileNode, profilePC);
 164 }