cpu: convert loop_predictor to new style stats
[gem5.git] / src / cpu / thread_state.cc
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include "cpu/thread_state.hh"
30
31 #include "base/output.hh"
32 #include "cpu/base.hh"
33 #include "mem/port.hh"
34 #include "mem/port_proxy.hh"
35 #include "mem/se_translating_port_proxy.hh"
36 #include "mem/translating_port_proxy.hh"
37 #include "sim/full_system.hh"
38 #include "sim/serialize.hh"
39 #include "sim/system.hh"
40
41 ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
42 : numInst(0), numOp(0), numLoad(0), startNumLoad(0),
43 _status(ThreadContext::Halted), baseCpu(cpu),
44 _contextId(0), _threadId(_tid), lastActivate(0), lastSuspend(0),
45 process(_process), physProxy(NULL), virtProxy(NULL),
46 funcExeInst(0), storeCondFailures(0)
47 {
48 }
49
50 ThreadState::~ThreadState()
51 {
52 if (physProxy != NULL)
53 delete physProxy;
54 if (virtProxy != NULL)
55 delete virtProxy;
56 }
57
58 void
59 ThreadState::serialize(CheckpointOut &cp) const
60 {
61 SERIALIZE_ENUM(_status);
62 // thread_num and cpu_id are deterministic from the config
63 SERIALIZE_SCALAR(funcExeInst);
64
65 if (!FullSystem)
66 return;
67 }
68
69 void
70 ThreadState::unserialize(CheckpointIn &cp)
71 {
72
73 UNSERIALIZE_ENUM(_status);
74 // thread_num and cpu_id are deterministic from the config
75 UNSERIALIZE_SCALAR(funcExeInst);
76
77 if (!FullSystem)
78 return;
79 }
80
81 void
82 ThreadState::initMemProxies(ThreadContext *tc)
83 {
84 // The port proxies only refer to the data port on the CPU side
85 // and can safely be done at init() time even if the CPU is not
86 // connected, i.e. when restoring from a checkpoint and later
87 // switching the CPU in.
88 if (FullSystem) {
89 assert(physProxy == NULL);
90 // This cannot be done in the constructor as the thread state
91 // itself is created in the base cpu constructor and the
92 // getSendFunctional is a virtual function
93 physProxy = new PortProxy(baseCpu->getSendFunctional(),
94 baseCpu->cacheLineSize());
95
96 assert(virtProxy == NULL);
97 virtProxy = new TranslatingPortProxy(tc);
98 } else {
99 assert(virtProxy == NULL);
100 virtProxy = new SETranslatingPortProxy(
101 tc, SETranslatingPortProxy::NextPage);
102 }
103 }
104
105 PortProxy &
106 ThreadState::getPhysProxy()
107 {
108 assert(FullSystem);
109 assert(physProxy != NULL);
110 return *physProxy;
111 }
112
113 PortProxy &
114 ThreadState::getVirtProxy()
115 {
116 assert(virtProxy != NULL);
117 return *virtProxy;
118 }