src/cpu/thread_state.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  */
  30
  31 #ifndef __CPU_THREAD_STATE_HH__
  32 #define __CPU_THREAD_STATE_HH__
  33
  34 #include "arch/types.hh"
  35 #include "cpu/profile.hh"
  36 #include "cpu/thread_context.hh"
  37 #include "cpu/base.hh"
  38
  39 #if !FULL_SYSTEM
  40 #include "mem/mem_object.hh"
  41 #include "sim/process.hh"
  42 #endif
  43
  44 #if FULL_SYSTEM
  45 class EndQuiesceEvent;
  46 class FunctionProfile;
  47 class ProfileNode;
  48 namespace TheISA {
  49     namespace Kernel {
  50         class Statistics;
  51     };
  52 };
  53 #endif
  54
  55 class Checkpoint;
  56 class Port;
  57 class TranslatingPort;
  58
  59 /**
  60  *  Struct for holding general thread state that is needed across CPU
  61  *  models.  This includes things such as pointers to the process,
  62  *  memory, quiesce events, and certain stats.  This can be expanded
  63  *  to hold more thread-specific stats within it.
  64  */
  65 struct ThreadState {
  66     typedef ThreadContext::Status Status;
  67
  68 #if FULL_SYSTEM
  69     ThreadState(BaseCPU *cpu, int _tid);
  70 #else
  71     ThreadState(BaseCPU *cpu, int _tid, Process *_process, short _asid);
  72 #endif
  73
  74     ~ThreadState();
  75
  76     void serialize(std::ostream &os);
  77
  78     void unserialize(Checkpoint *cp, const std::string &section);
  79
  80     int cpuId() { return baseCpu->cpuId(); }
  81
  82     int contextId() { return _contextId; }
  83
  84     void setContextId(int id) { _contextId = id; }
  85
  86     void setThreadId(int id) { _threadId = id; }
  87
  88     int threadId() { return _threadId; }
  89
  90     Tick readLastActivate() { return lastActivate; }
  91
  92     Tick readLastSuspend() { return lastSuspend; }
  93
  94 #if FULL_SYSTEM
  95     void connectMemPorts(ThreadContext *tc);
  96
  97     void connectPhysPort();
  98
  99     void connectVirtPort(ThreadContext *tc);
 100
 101     void dumpFuncProfile();
 102
 103     EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
 104
 105     void profileClear();
 106
 107     void profileSample();
 108
 109     TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; }
 110
 111     FunctionalPort *getPhysPort() { return physPort; }
 112
 113     void setPhysPort(FunctionalPort *port) { physPort = port; }
 114
 115     VirtualPort *getVirtPort() { return virtPort; }
 116 #else
 117     Process *getProcessPtr() { return process; }
 118
 119     TranslatingPort *getMemPort();
 120
 121     void setMemPort(TranslatingPort *_port) { port = _port; }
 122
 123     int getInstAsid() { return asid; }
 124     int getDataAsid() { return asid; }
 125 #endif
 126
 127     /** Sets the current instruction being committed. */
 128     void setInst(TheISA::MachInst _inst) { inst = _inst; }
 129
 130     /** Returns the current instruction being committed. */
 131     TheISA::MachInst getInst() { return inst; }
 132
 133     /** Reads the number of instructions functionally executed and
 134      * committed.
 135      */
 136     Counter readFuncExeInst() { return funcExeInst; }
 137
 138     /** Sets the total number of instructions functionally executed
 139      * and committed.
 140      */
 141     void setFuncExeInst(Counter new_val) { funcExeInst = new_val; }
 142
 143     /** Returns the status of this thread. */
 144     Status status() const { return _status; }
 145
 146     /** Sets the status of this thread. */
 147     void setStatus(Status new_status) { _status = new_status; }
 148
 149   public:
 150     /** Connects port to the functional port of the memory object
 151      * below the CPU. */
 152     void connectToMemFunc(Port *port);
 153
 154     /** Number of instructions committed. */
 155     Counter numInst;
 156     /** Stat for number instructions committed. */
 157     Stats::Scalar numInsts;
 158     /** Stat for number of memory references. */
 159     Stats::Scalar numMemRefs;
 160
 161     /** Number of simulated loads, used for tracking events based on
 162      * the number of loads committed.
 163      */
 164     Counter numLoad;
 165
 166     /** The number of simulated loads committed prior to this run. */
 167     Counter startNumLoad;
 168
 169   protected:
 170     ThreadContext::Status _status;
 171
 172     // Pointer to the base CPU.
 173     BaseCPU *baseCpu;
 174
 175     // system wide HW context id
 176     int _contextId;
 177
 178     // Index of hardware thread context on the CPU that this represents.
 179     int _threadId;
 180
 181   public:
 182     /** Last time activate was called on this thread. */
 183     Tick lastActivate;
 184
 185     /** Last time suspend was called on this thread. */
 186     Tick lastSuspend;
 187
 188 #if FULL_SYSTEM
 189   public:
 190     FunctionProfile *profile;
 191     ProfileNode *profileNode;
 192     Addr profilePC;
 193     EndQuiesceEvent *quiesceEvent;
 194
 195     TheISA::Kernel::Statistics *kernelStats;
 196   protected:
 197     /** A functional port outgoing only for functional accesses to physical
 198      * addresses.*/
 199     FunctionalPort *physPort;
 200
 201     /** A functional port, outgoing only, for functional accesse to virtual
 202      * addresses. */
 203     VirtualPort *virtPort;
 204 #else
 205     TranslatingPort *port;
 206
 207     Process *process;
 208
 209     // Address space ID.  Note that this is used for TIMING cache
 210     // simulation only; all functional memory accesses should use
 211     // one of the FunctionalMemory pointers above.
 212     short asid;
 213
 214 #endif
 215
 216     /** Current instruction the thread is committing.  Only set and
 217      * used for DTB faults currently.
 218      */
 219     TheISA::MachInst inst;
 220
 221     /** The current microcode pc for the currently executing macro
 222      * operation.
 223      */
 224     MicroPC microPC;
 225
 226     /** The next microcode pc for the currently executing macro
 227      * operation.
 228      */
 229     MicroPC nextMicroPC;
 230
 231   public:
 232     /**
 233      * Temporary storage to pass the source address from copy_load to
 234      * copy_store.
 235      * @todo Remove this temporary when we have a better way to do it.
 236      */
 237     Addr copySrcAddr;
 238     /**
 239      * Temp storage for the physical source address of a copy.
 240      * @todo Remove this temporary when we have a better way to do it.
 241      */
 242     Addr copySrcPhysAddr;
 243
 244     /*
 245      * number of executed instructions, for matching with syscall trace
 246      * points in EIO files.
 247      */
 248     Counter funcExeInst;
 249
 250     //
 251     // Count failed store conditionals so we can warn of apparent
 252     // application deadlock situations.
 253     unsigned storeCondFailures;
 254 };
 255
 256 #endif // __CPU_THREAD_STATE_HH__