src/cpu/thread_state.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  */
  30
  31 #ifndef __CPU_THREAD_STATE_HH__
  32 #define __CPU_THREAD_STATE_HH__
  33
  34 #include "arch/types.hh"
  35 #include "cpu/profile.hh"
  36 #include "cpu/thread_context.hh"
  37 #include "cpu/base.hh"
  38
  39 #if !FULL_SYSTEM
  40 #include "mem/mem_object.hh"
  41 #include "sim/process.hh"
  42 #endif
  43
  44 #if FULL_SYSTEM
  45 class EndQuiesceEvent;
  46 class FunctionProfile;
  47 class ProfileNode;
  48 namespace TheISA {
  49     namespace Kernel {
  50         class Statistics;
  51     };
  52 };
  53 #endif
  54
  55 class Checkpoint;
  56 class Port;
  57 class TranslatingPort;
  58
  59 /**
  60  *  Struct for holding general thread state that is needed across CPU
  61  *  models.  This includes things such as pointers to the process,
  62  *  memory, quiesce events, and certain stats.  This can be expanded
  63  *  to hold more thread-specific stats within it.
  64  */
  65 struct ThreadState {
  66     typedef ThreadContext::Status Status;
  67
  68 #if FULL_SYSTEM
  69     ThreadState(BaseCPU *cpu, ThreadID _tid);
  70 #else
  71     ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
  72 #endif
  73
  74     ~ThreadState();
  75
  76     void serialize(std::ostream &os);
  77
  78     void unserialize(Checkpoint *cp, const std::string &section);
  79
  80     int cpuId() { return baseCpu->cpuId(); }
  81
  82     int contextId() { return _contextId; }
  83
  84     void setContextId(int id) { _contextId = id; }
  85
  86     void setThreadId(ThreadID id) { _threadId = id; }
  87
  88     ThreadID threadId() { return _threadId; }
  89
  90     Tick readLastActivate() { return lastActivate; }
  91
  92     Tick readLastSuspend() { return lastSuspend; }
  93
  94 #if FULL_SYSTEM
  95     void connectMemPorts(ThreadContext *tc);
  96
  97     void connectPhysPort();
  98
  99     void connectVirtPort(ThreadContext *tc);
 100
 101     void dumpFuncProfile();
 102
 103     EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
 104
 105     void profileClear();
 106
 107     void profileSample();
 108
 109     TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; }
 110
 111     FunctionalPort *getPhysPort() { return physPort; }
 112
 113     void setPhysPort(FunctionalPort *port) { physPort = port; }
 114
 115     VirtualPort *getVirtPort() { return virtPort; }
 116 #else
 117     Process *getProcessPtr() { return process; }
 118
 119     TranslatingPort *getMemPort();
 120
 121     void setMemPort(TranslatingPort *_port) { port = _port; }
 122 #endif
 123
 124     /** Sets the current instruction being committed. */
 125     void setInst(TheISA::MachInst _inst) { inst = _inst; }
 126
 127     /** Returns the current instruction being committed. */
 128     TheISA::MachInst getInst() { return inst; }
 129
 130     /** Reads the number of instructions functionally executed and
 131      * committed.
 132      */
 133     Counter readFuncExeInst() { return funcExeInst; }
 134
 135     /** Sets the total number of instructions functionally executed
 136      * and committed.
 137      */
 138     void setFuncExeInst(Counter new_val) { funcExeInst = new_val; }
 139
 140     /** Returns the status of this thread. */
 141     Status status() const { return _status; }
 142
 143     /** Sets the status of this thread. */
 144     void setStatus(Status new_status) { _status = new_status; }
 145
 146   public:
 147     /** Connects port to the functional port of the memory object
 148      * below the CPU. */
 149     void connectToMemFunc(Port *port);
 150
 151     /** Number of instructions committed. */
 152     Counter numInst;
 153     /** Stat for number instructions committed. */
 154     Stats::Scalar numInsts;
 155     /** Stat for number of memory references. */
 156     Stats::Scalar numMemRefs;
 157
 158     /** Number of simulated loads, used for tracking events based on
 159      * the number of loads committed.
 160      */
 161     Counter numLoad;
 162
 163     /** The number of simulated loads committed prior to this run. */
 164     Counter startNumLoad;
 165
 166   protected:
 167     ThreadContext::Status _status;
 168
 169     // Pointer to the base CPU.
 170     BaseCPU *baseCpu;
 171
 172     // system wide HW context id
 173     int _contextId;
 174
 175     // Index of hardware thread context on the CPU that this represents.
 176     ThreadID _threadId;
 177
 178   public:
 179     /** Last time activate was called on this thread. */
 180     Tick lastActivate;
 181
 182     /** Last time suspend was called on this thread. */
 183     Tick lastSuspend;
 184
 185 #if FULL_SYSTEM
 186   public:
 187     FunctionProfile *profile;
 188     ProfileNode *profileNode;
 189     Addr profilePC;
 190     EndQuiesceEvent *quiesceEvent;
 191
 192     TheISA::Kernel::Statistics *kernelStats;
 193   protected:
 194     /** A functional port outgoing only for functional accesses to physical
 195      * addresses.*/
 196     FunctionalPort *physPort;
 197
 198     /** A functional port, outgoing only, for functional accesse to virtual
 199      * addresses. */
 200     VirtualPort *virtPort;
 201 #else
 202     TranslatingPort *port;
 203
 204     Process *process;
 205 #endif
 206
 207     /** Current instruction the thread is committing.  Only set and
 208      * used for DTB faults currently.
 209      */
 210     TheISA::MachInst inst;
 211
 212   public:
 213     /**
 214      * Temporary storage to pass the source address from copy_load to
 215      * copy_store.
 216      * @todo Remove this temporary when we have a better way to do it.
 217      */
 218     Addr copySrcAddr;
 219     /**
 220      * Temp storage for the physical source address of a copy.
 221      * @todo Remove this temporary when we have a better way to do it.
 222      */
 223     Addr copySrcPhysAddr;
 224
 225     /*
 226      * number of executed instructions, for matching with syscall trace
 227      * points in EIO files.
 228      */
 229     Counter funcExeInst;
 230
 231     //
 232     // Count failed store conditionals so we can warn of apparent
 233     // application deadlock situations.
 234     unsigned storeCondFailures;
 235 };
 236
 237 #endif // __CPU_THREAD_STATE_HH__