src/cpu/thread_state.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  */
  30
  31 #ifndef __CPU_THREAD_STATE_HH__
  32 #define __CPU_THREAD_STATE_HH__
  33
  34 #include "arch/types.hh"
  35 #include "config/the_isa.hh"
  36 #include "cpu/base.hh"
  37 #include "cpu/profile.hh"
  38 #include "cpu/thread_context.hh"
  39 #include "mem/mem_object.hh"
  40 #include "sim/process.hh"
  41
  42 class EndQuiesceEvent;
  43 class FunctionProfile;
  44 class ProfileNode;
  45 namespace TheISA {
  46     namespace Kernel {
  47         class Statistics;
  48     };
  49 };
  50
  51 class Checkpoint;
  52 class Port;
  53 class TranslatingPort;
  54
  55 /**
  56  *  Struct for holding general thread state that is needed across CPU
  57  *  models.  This includes things such as pointers to the process,
  58  *  memory, quiesce events, and certain stats.  This can be expanded
  59  *  to hold more thread-specific stats within it.
  60  */
  61 struct ThreadState {
  62     typedef ThreadContext::Status Status;
  63
  64     ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
  65
  66     ~ThreadState();
  67
  68     void serialize(std::ostream &os);
  69
  70     void unserialize(Checkpoint *cp, const std::string &section);
  71
  72     int cpuId() { return baseCpu->cpuId(); }
  73
  74     int contextId() { return _contextId; }
  75
  76     void setContextId(int id) { _contextId = id; }
  77
  78     void setThreadId(ThreadID id) { _threadId = id; }
  79
  80     ThreadID threadId() { return _threadId; }
  81
  82     Tick readLastActivate() { return lastActivate; }
  83
  84     Tick readLastSuspend() { return lastSuspend; }
  85
  86     void connectPhysPort();
  87
  88     void connectVirtPort(ThreadContext *tc);
  89
  90     void connectMemPorts(ThreadContext *tc);
  91
  92     void dumpFuncProfile();
  93
  94     EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
  95
  96     void profileClear();
  97
  98     void profileSample();
  99
 100     TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; }
 101
 102     Process *getProcessPtr() { return process; }
 103
 104     TranslatingPort *getMemPort();
 105
 106     void setMemPort(TranslatingPort *_port) { port = _port; }
 107
 108     VirtualPort *getVirtPort() { return virtPort; }
 109
 110     FunctionalPort *getPhysPort() { return physPort; }
 111
 112     void setPhysPort(FunctionalPort *port) { physPort = port; }
 113
 114     /** Reads the number of instructions functionally executed and
 115      * committed.
 116      */
 117     Counter readFuncExeInst() { return funcExeInst; }
 118
 119     /** Sets the total number of instructions functionally executed
 120      * and committed.
 121      */
 122     void setFuncExeInst(Counter new_val) { funcExeInst = new_val; }
 123
 124     /** Returns the status of this thread. */
 125     Status status() const { return _status; }
 126
 127     /** Sets the status of this thread. */
 128     void setStatus(Status new_status) { _status = new_status; }
 129
 130   public:
 131     /** Connects port to the functional port of the memory object
 132      * below the CPU. */
 133     void connectToMemFunc(Port *port);
 134
 135     /** Number of instructions committed. */
 136     Counter numInst;
 137     /** Stat for number instructions committed. */
 138     Stats::Scalar numInsts;
 139     /** Stat for number of memory references. */
 140     Stats::Scalar numMemRefs;
 141
 142     /** Number of simulated loads, used for tracking events based on
 143      * the number of loads committed.
 144      */
 145     Counter numLoad;
 146
 147     /** The number of simulated loads committed prior to this run. */
 148     Counter startNumLoad;
 149
 150   protected:
 151     ThreadContext::Status _status;
 152
 153     // Pointer to the base CPU.
 154     BaseCPU *baseCpu;
 155
 156     // system wide HW context id
 157     int _contextId;
 158
 159     // Index of hardware thread context on the CPU that this represents.
 160     ThreadID _threadId;
 161
 162   public:
 163     /** Last time activate was called on this thread. */
 164     Tick lastActivate;
 165
 166     /** Last time suspend was called on this thread. */
 167     Tick lastSuspend;
 168
 169   public:
 170     FunctionProfile *profile;
 171     ProfileNode *profileNode;
 172     Addr profilePC;
 173     EndQuiesceEvent *quiesceEvent;
 174
 175     TheISA::Kernel::Statistics *kernelStats;
 176
 177   protected:
 178     Process *process;
 179
 180     TranslatingPort *port;
 181
 182     /** A functional port, outgoing only, for functional accesse to virtual
 183      * addresses. */
 184     VirtualPort *virtPort;
 185
 186     /** A functional port outgoing only for functional accesses to physical
 187      * addresses.*/
 188     FunctionalPort *physPort;
 189
 190   public:
 191     /*
 192      * number of executed instructions, for matching with syscall trace
 193      * points in EIO files.
 194      */
 195     Counter funcExeInst;
 196
 197     //
 198     // Count failed store conditionals so we can warn of apparent
 199     // application deadlock situations.
 200     unsigned storeCondFailures;
 201 };
 202
 203 #endif // __CPU_THREAD_STATE_HH__