src/cpu/thread_state.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Kevin Lim
  29  */
  30
  31 #ifndef __CPU_THREAD_STATE_HH__
  32 #define __CPU_THREAD_STATE_HH__
  33
  34 #include "arch/types.hh"
  35 #include "cpu/profile.hh"
  36 #include "cpu/thread_context.hh"
  37
  38 #if !FULL_SYSTEM
  39 #include "mem/mem_object.hh"
  40 #include "sim/process.hh"
  41 #endif
  42
  43 #if FULL_SYSTEM
  44 class EndQuiesceEvent;
  45 class FunctionProfile;
  46 class ProfileNode;
  47 namespace TheISA {
  48     namespace Kernel {
  49         class Statistics;
  50     };
  51 };
  52 #endif
  53
  54 class BaseCPU;
  55 class Checkpoint;
  56 class Port;
  57 class TranslatingPort;
  58
  59 /**
  60  *  Struct for holding general thread state that is needed across CPU
  61  *  models.  This includes things such as pointers to the process,
  62  *  memory, quiesce events, and certain stats.  This can be expanded
  63  *  to hold more thread-specific stats within it.
  64  */
  65 struct ThreadState {
  66     typedef ThreadContext::Status Status;
  67
  68 #if FULL_SYSTEM
  69     ThreadState(BaseCPU *cpu, int _cpuId, int _tid);
  70 #else
  71     ThreadState(BaseCPU *cpu, int _cpuId, int _tid, Process *_process,
  72                 short _asid);
  73 #endif
  74
  75     ~ThreadState();
  76
  77     void serialize(std::ostream &os);
  78
  79     void unserialize(Checkpoint *cp, const std::string &section);
  80
  81     void setCpuId(int id) { cpuId = id; }
  82
  83     int readCpuId() { return cpuId; }
  84
  85     void setTid(int id) { tid = id; }
  86
  87     int readTid() { return tid; }
  88
  89     Tick readLastActivate() { return lastActivate; }
  90
  91     Tick readLastSuspend() { return lastSuspend; }
  92
  93 #if FULL_SYSTEM
  94     void dumpFuncProfile();
  95
  96     EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
  97
  98     void profileClear();
  99
 100     void profileSample();
 101
 102     TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; }
 103
 104     FunctionalPort *getPhysPort() { return physPort; }
 105
 106     void setPhysPort(FunctionalPort *port) { physPort = port; }
 107
 108     VirtualPort *getVirtPort(ThreadContext *tc = NULL) { return virtPort; }
 109
 110     void setVirtPort(VirtualPort *port) { virtPort = port; }
 111 #else
 112     Process *getProcessPtr() { return process; }
 113
 114     TranslatingPort *getMemPort();
 115
 116     void setMemPort(TranslatingPort *_port) { port = _port; }
 117
 118     int getInstAsid() { return asid; }
 119     int getDataAsid() { return asid; }
 120 #endif
 121
 122     /** Sets the current instruction being committed. */
 123     void setInst(TheISA::MachInst _inst) { inst = _inst; }
 124
 125     /** Returns the current instruction being committed. */
 126     TheISA::MachInst getInst() { return inst; }
 127
 128     /** Reads the number of instructions functionally executed and
 129      * committed.
 130      */
 131     Counter readFuncExeInst() { return funcExeInst; }
 132
 133     /** Sets the total number of instructions functionally executed
 134      * and committed.
 135      */
 136     void setFuncExeInst(Counter new_val) { funcExeInst = new_val; }
 137
 138     /** Returns the status of this thread. */
 139     Status status() const { return _status; }
 140
 141     /** Sets the status of this thread. */
 142     void setStatus(Status new_status) { _status = new_status; }
 143
 144   protected:
 145     /** Gets a functional port from the memory object that's connected
 146      * to the CPU. */
 147     Port *getMemFuncPort();
 148
 149   public:
 150     /** Number of instructions committed. */
 151     Counter numInst;
 152     /** Stat for number instructions committed. */
 153     Stats::Scalar<> numInsts;
 154     /** Stat for number of memory references. */
 155     Stats::Scalar<> numMemRefs;
 156
 157     /** Number of simulated loads, used for tracking events based on
 158      * the number of loads committed.
 159      */
 160     Counter numLoad;
 161
 162     /** The number of simulated loads committed prior to this run. */
 163     Counter startNumLoad;
 164
 165   protected:
 166     ThreadContext::Status _status;
 167
 168     // Pointer to the base CPU.
 169     BaseCPU *baseCpu;
 170
 171     // ID of this context w.r.t. the System or Process object to which
 172     // it belongs.  For full-system mode, this is the system CPU ID.
 173     int cpuId;
 174
 175     // Index of hardware thread context on the CPU that this represents.
 176     int tid;
 177
 178   public:
 179     /** Last time activate was called on this thread. */
 180     Tick lastActivate;
 181
 182     /** Last time suspend was called on this thread. */
 183     Tick lastSuspend;
 184
 185 #if FULL_SYSTEM
 186   public:
 187     FunctionProfile *profile;
 188     ProfileNode *profileNode;
 189     Addr profilePC;
 190     EndQuiesceEvent *quiesceEvent;
 191
 192     TheISA::Kernel::Statistics *kernelStats;
 193   protected:
 194     /** A functional port outgoing only for functional accesses to physical
 195      * addresses.*/
 196     FunctionalPort *physPort;
 197
 198     /** A functional port, outgoing only, for functional accesse to virtual
 199      * addresses. That doen't require execution context information */
 200     VirtualPort *virtPort;
 201 #else
 202     TranslatingPort *port;
 203
 204     Process *process;
 205
 206     // Address space ID.  Note that this is used for TIMING cache
 207     // simulation only; all functional memory accesses should use
 208     // one of the FunctionalMemory pointers above.
 209     short asid;
 210
 211 #endif
 212
 213     /** Current instruction the thread is committing.  Only set and
 214      * used for DTB faults currently.
 215      */
 216     TheISA::MachInst inst;
 217
 218     /** The current microcode pc for the currently executing macro
 219      * operation.
 220      */
 221     MicroPC microPC;
 222
 223     /** The next microcode pc for the currently executing macro
 224      * operation.
 225      */
 226     MicroPC nextMicroPC;
 227
 228   public:
 229     /**
 230      * Temporary storage to pass the source address from copy_load to
 231      * copy_store.
 232      * @todo Remove this temporary when we have a better way to do it.
 233      */
 234     Addr copySrcAddr;
 235     /**
 236      * Temp storage for the physical source address of a copy.
 237      * @todo Remove this temporary when we have a better way to do it.
 238      */
 239     Addr copySrcPhysAddr;
 240
 241     /*
 242      * number of executed instructions, for matching with syscall trace
 243      * points in EIO files.
 244      */
 245     Counter funcExeInst;
 246
 247     //
 248     // Count failed store conditionals so we can warn of apparent
 249     // application deadlock situations.
 250     unsigned storeCondFailures;
 251 };
 252
 253 #endif // __CPU_THREAD_STATE_HH__