src/cpu/trace/opt_cpu.hh

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Erik Hallnor
  29  */
  30
  31 /**
  32  * @file
  33  * Declaration of a memory trace CPU object for optimal caches. Uses a memory
  34  * trace to access a fully associative cache with optimal replacement.
  35  */
  36
  37 #ifndef __CPU_TRACE_OPT_CPU_HH__
  38 #define __CPU_TRACE_OPT_CPU_HH__
  39
  40 #include <vector>
  41
  42 #include "mem/mem_req.hh" // for MemReqPtr
  43 #include "sim/eventq.hh" // for Event
  44 #include "sim/sim_object.hh"
  45
  46 // Forward Declaration
  47 class MemTraceReader;
  48
  49 /**
  50  * A CPU object to simulate a fully-associative cache with optimal replacement.
  51  */
  52 class OptCPU : public SimObject
  53 {
  54   private:
  55     typedef int RefIndex;
  56
  57     typedef std::vector<RefIndex> L3Table;
  58     typedef std::vector<L3Table> L2Table;
  59     typedef std::vector<L2Table> L1Table;
  60
  61     /**
  62      * Event to call OptCPU::tick
  63      */
  64     class TickEvent : public Event
  65     {
  66       private:
  67         /** The associated CPU */
  68         OptCPU *cpu;
  69
  70       public:
  71         /**
  72          * Construct this event;
  73          */
  74         TickEvent(OptCPU *c);
  75
  76         /**
  77          * Call the tick function.
  78          */
  79         void process();
  80
  81         /**
  82          * Return a string description of this event.
  83          */
  84         const char *description();
  85     };
  86
  87     TickEvent tickEvent;
  88
  89     class RefInfo
  90     {
  91       public:
  92         RefIndex nextRefTime;
  93         Addr addr;
  94     };
  95
  96     /** Reference Information, per set. */
  97     std::vector<std::vector<RefInfo> > refInfo;
  98
  99     /** Lookup table to track blocks in the cache heap */
 100     L1Table lookupTable;
 101
 102     /**
 103      * Return the correct value in the lookup table.
 104      */
 105     RefIndex lookupValue(Addr addr)
 106     {
 107         int l1_index = (addr >> 32) & 0x0f;
 108         int l2_index = (addr >> 16) & 0xffff;
 109         int l3_index = addr & 0xffff;
 110         assert(l1_index == addr >> 32);
 111         return lookupTable[l1_index][l2_index][l3_index];
 112     }
 113
 114     /**
 115      * Set the value in the lookup table.
 116      */
 117     void setValue(Addr addr, RefIndex index)
 118     {
 119         int l1_index = (addr >> 32) & 0x0f;
 120         int l2_index = (addr >> 16) & 0xffff;
 121         int l3_index = addr & 0xffff;
 122         assert(l1_index == addr >> 32);
 123         lookupTable[l1_index][l2_index][l3_index]=index;
 124     }
 125
 126     /**
 127      * Initialize the lookup table to the given value.
 128      */
 129     void initTable(Addr addr, RefIndex index);
 130
 131     void heapSwap(int set, int a, int b) {
 132         RefIndex tmp = cacheHeap[a];
 133         cacheHeap[a] = cacheHeap[b];
 134         cacheHeap[b] = tmp;
 135
 136         setValue(refInfo[set][cacheHeap[a]].addr, a);
 137         setValue(refInfo[set][cacheHeap[b]].addr, b);
 138     }
 139
 140     int heapLeft(int index) { return index + index + 1; }
 141     int heapRight(int index) { return index + index + 2; }
 142     int heapParent(int index) { return (index - 1) >> 1; }
 143
 144     RefIndex heapRank(int set, int index) {
 145         return refInfo[set][cacheHeap[index]].nextRefTime;
 146     }
 147
 148     void heapify(int set, int start){
 149         int left = heapLeft(start);
 150         int right = heapRight(start);
 151         int max = start;
 152         if (left < assoc && heapRank(set, left) > heapRank(set, start)) {
 153             max = left;
 154         }
 155         if (right < assoc && heapRank(set, right) >  heapRank(set, max)) {
 156             max = right;
 157         }
 158
 159         if (max != start) {
 160             heapSwap(set, start, max);
 161             heapify(set, max);
 162         }
 163     }
 164
 165     void verifyHeap(int set, int start) {
 166         int left = heapLeft(start);
 167         int right = heapRight(start);
 168
 169         if (left < assoc) {
 170             assert(heapRank(set, start) >= heapRank(set, left));
 171             verifyHeap(set, left);
 172         }
 173         if (right < assoc) {
 174             assert(heapRank(set, start) >= heapRank(set, right));
 175             verifyHeap(set, right);
 176         }
 177     }
 178
 179     void processRankIncrease(int set, int start) {
 180         int parent = heapParent(start);
 181         while (start > 0 && heapRank(set,parent) < heapRank(set,start)) {
 182             heapSwap(set, parent, start);
 183             start = parent;
 184             parent = heapParent(start);
 185         }
 186     }
 187
 188     void processSet(int set);
 189
 190     static const RefIndex InfiniteRef = 0x7fffffff;
 191
 192     /** Memory reference trace. */
 193     MemTraceReader *trace;
 194
 195     /** Cache heap for replacement. */
 196     std::vector<RefIndex> cacheHeap;
 197
 198     /** The number of blocks in the cache. */
 199     const int numBlks;
 200
 201     const int assoc;
 202     const int numSets;
 203     const int setMask;
 204
 205
 206     int misses;
 207     int hits;
 208
 209   public:
 210     /**
 211      * Construct a OptCPU object.
 212      */
 213     OptCPU(const std::string &name,
 214            MemTraceReader *_trace,
 215            int block_size,
 216            int cache_size,
 217            int assoc);
 218
 219     /**
 220      * Perform the optimal replacement simulation.
 221      */
 222     void tick();
 223 };
 224
 225 #endif // __CPU_TRACE_OPT_CPU_HH__