dev: Delete the authors list from files in src/dev.
[gem5.git] / src / dev / Device.py
1 # Copyright (c) 2012-2016,2019 ARM Limited
2 # All rights reserved.
3 #
4 # The license below extends only to copyright in the software and shall
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11 # modified or unmodified, in source code or in binary form.
12 #
13 # Copyright (c) 2005-2007 The Regents of The University of Michigan
14 # All rights reserved.
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16 # Redistribution and use in source and binary forms, with or without
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25 # this software without specific prior written permission.
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27 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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29 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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33 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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37 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38
39 from m5.params import *
40 from m5.proxy import *
41 from m5.util.fdthelper import *
42
43 from m5.objects.ClockedObject import ClockedObject
44
45 class PioDevice(ClockedObject):
46 type = 'PioDevice'
47 cxx_header = "dev/io_device.hh"
48 abstract = True
49 pio = SlavePort("Programmed I/O port")
50 system = Param.System(Parent.any, "System this device is part of")
51
52 def generateBasicPioDeviceNode(self, state, name, pio_addr,
53 size, interrupts = None):
54 node = FdtNode("%s@%x" % (name, long(pio_addr)))
55 node.append(FdtPropertyWords("reg",
56 state.addrCells(pio_addr) +
57 state.sizeCells(size) ))
58
59 if interrupts:
60 if any([i < 32 for i in interrupts]):
61 raise(("Interrupt number smaller than 32 "+
62 " in PioDevice %s") % name)
63
64 # subtracting 32 because Linux assumes that SPIs start at 0, while
65 # gem5 uses the internal GIC numbering (SPIs start at 32)
66 node.append(FdtPropertyWords("interrupts", sum(
67 [[0, i - 32, 4] for i in interrupts], []) ))
68
69 return node
70
71 class BasicPioDevice(PioDevice):
72 type = 'BasicPioDevice'
73 cxx_header = "dev/io_device.hh"
74 abstract = True
75 pio_addr = Param.Addr("Device Address")
76 pio_latency = Param.Latency('100ns', "Programmed IO latency")
77
78 class DmaDevice(PioDevice):
79 type = 'DmaDevice'
80 cxx_header = "dev/dma_device.hh"
81 abstract = True
82 dma = MasterPort("DMA port")
83
84 _iommu = None
85
86 sid = Param.Unsigned(0,
87 "Stream identifier used by an IOMMU to distinguish amongst "
88 "several devices attached to it")
89 ssid = Param.Unsigned(0,
90 "Substream identifier used by an IOMMU to distinguish amongst "
91 "several devices attached to it")
92
93 def addIommuProperty(self, state, node):
94 """
95 This method takes an FdtState and a FdtNode as parameters, and
96 it is appending a "iommus = <>" property in case the DmaDevice
97 is attached to an IOMMU.
98 This method is necessary for autogenerating a binding between
99 a dma device and the iommu.
100 """
101 if self._iommu is not None:
102 node.append(FdtPropertyWords("iommus",
103 [ state.phandle(self._iommu), self.sid ]))
104
105 class IsaFake(BasicPioDevice):
106 type = 'IsaFake'
107 cxx_header = "dev/isa_fake.hh"
108 pio_size = Param.Addr(0x8, "Size of address range")
109 ret_data8 = Param.UInt8(0xFF, "Default data to return")
110 ret_data16 = Param.UInt16(0xFFFF, "Default data to return")
111 ret_data32 = Param.UInt32(0xFFFFFFFF, "Default data to return")
112 ret_data64 = Param.UInt64(0xFFFFFFFFFFFFFFFF, "Default data to return")
113 ret_bad_addr = Param.Bool(False, "Return pkt status bad address on access")
114 update_data = Param.Bool(False, "Update the data that is returned on writes")
115 warn_access = Param.String("", "String to print when device is accessed")
116 fake_mem = Param.Bool(False,
117 "Is this device acting like a memory and thus may get a cache line sized req")
118
119 class BadAddr(IsaFake):
120 pio_addr = 0
121 ret_bad_addr = Param.Bool(True, "Return pkt status bad address on access")
122
123