src/dev/Ide.py

   1 # Copyright (c) 2005-2007 The Regents of The University of Michigan
   2 # All rights reserved.
   3 #
   4 # Redistribution and use in source and binary forms, with or without
   5 # modification, are permitted provided that the following conditions are
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   7 # notice, this list of conditions and the following disclaimer;
   8 # redistributions in binary form must reproduce the above copyright
   9 # notice, this list of conditions and the following disclaimer in the
  10 # documentation and/or other materials provided with the distribution;
  11 # neither the name of the copyright holders nor the names of its
  12 # contributors may be used to endorse or promote products derived from
  13 # this software without specific prior written permission.
  14 #
  15 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  16 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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  18 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  19 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  20 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  21 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  22 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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  25 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26 #
  27 # Authors: Nathan Binkert
  28
  29 from m5.SimObject import SimObject
  30 from m5.params import *
  31 from Pci import PciDevice, PciConfigData
  32
  33 class IdeID(Enum): vals = ['master', 'slave']
  34
  35 class IdeControllerPciData(PciConfigData):
  36     VendorID = 0x8086
  37     DeviceID = 0x7111
  38     Command = 0x0
  39     Status = 0x280
  40     Revision = 0x0
  41     ClassCode = 0x01
  42     SubClassCode = 0x01
  43     ProgIF = 0x85
  44     BAR0 = 0x00000001
  45     BAR1 = 0x00000001
  46     BAR2 = 0x00000001
  47     BAR3 = 0x00000001
  48     BAR4 = 0x00000001
  49     BAR5 = 0x00000001
  50     InterruptLine = 0x1f
  51     InterruptPin = 0x01
  52     BAR0Size = '8B'
  53     BAR1Size = '4B'
  54     BAR2Size = '8B'
  55     BAR3Size = '4B'
  56     BAR4Size = '16B'
  57
  58 class IdeDisk(SimObject):
  59     type = 'IdeDisk'
  60     delay = Param.Latency('1us', "Fixed disk delay in microseconds")
  61     driveID = Param.IdeID('master', "Drive ID")
  62     image = Param.DiskImage("Disk image")
  63
  64 class IdeController(PciDevice):
  65     type = 'IdeController'
  66     disks = VectorParam.IdeDisk("IDE disks attached to this controller")
  67
  68     configdata =IdeControllerPciData()