3 # Copyright (c) 2006 The Regents of The University of Michigan
6 # Redistribution and use in source and binary forms, with or without
7 # modification, are permitted provided that the following conditions are
8 # met: redistributions of source code must retain the above copyright
9 # notice, this list of conditions and the following disclaimer;
10 # redistributions in binary form must reproduce the above copyright
11 # notice, this list of conditions and the following disclaimer in the
12 # documentation and/or other materials provided with the distribution;
13 # neither the name of the copyright holders nor the names of its
14 # contributors may be used to endorse or promote products derived from
15 # this software without specific prior written permission.
17 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 # Authors: Steve Reinhardt
34 SimObject('Device.py')
35 Source('io_device.cc')
39 if env['TARGET_ISA'] == 'null':
42 SimObject('BadDevice.py')
43 SimObject('CopyEngine.py')
44 SimObject('DiskImage.py')
45 SimObject('Ethernet.py')
49 SimObject('Platform.py')
50 SimObject('SimpleDisk.py')
51 SimObject('Terminal.py')
55 Source('copy_engine.cc')
56 Source('disk_image.cc')
57 Source('dma_device.cc')
59 Source('etherdevice.cc')
60 Source('etherdump.cc')
62 Source('etherlink.cc')
66 Source('i8254xGBe.cc')
69 Source('intel_8254_timer.cc')
72 Source('pciconfigall.cc')
77 Source('simple_disk.cc')
83 DebugFlag('DiskImageRead')
84 DebugFlag('DiskImageWrite')
86 DebugFlag('DMACopyEngine')
88 DebugFlag('EthernetCksum')
89 DebugFlag('EthernetDMA')
90 DebugFlag('EthernetData')
91 DebugFlag('EthernetDesc')
92 DebugFlag('EthernetEEPROM')
93 DebugFlag('EthernetIntr')
94 DebugFlag('EthernetPIO')
95 DebugFlag('EthernetSM')
98 DebugFlag('Intel8254Timer')
101 DebugFlag('PciConfigAll')
102 DebugFlag('SimpleDisk')
103 DebugFlag('SimpleDiskData')
104 DebugFlag('Terminal')
105 DebugFlag('TerminalVerbose')
108 CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ])
109 CompoundFlag('EthernetAll', [ 'Ethernet', 'EthernetPIO', 'EthernetDMA',
110 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM',
111 'EthernetCksum', 'EthernetEEPROM' ])
112 CompoundFlag('EthernetNoData', [ 'Ethernet', 'EthernetPIO', 'EthernetDesc',
113 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ])
114 CompoundFlag('IdeAll', [ 'IdeCtrl', 'IdeDisk' ])