3 # Copyright (c) 2006 The Regents of The University of Michigan
6 # Redistribution and use in source and binary forms, with or without
7 # modification, are permitted provided that the following conditions are
8 # met: redistributions of source code must retain the above copyright
9 # notice, this list of conditions and the following disclaimer;
10 # redistributions in binary form must reproduce the above copyright
11 # notice, this list of conditions and the following disclaimer in the
12 # documentation and/or other materials provided with the distribution;
13 # neither the name of the copyright holders nor the names of its
14 # contributors may be used to endorse or promote products derived from
15 # this software without specific prior written permission.
17 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 # Authors: Steve Reinhardt
34 if env['TARGET_ISA'] == 'no':
37 SimObject('BadDevice.py')
38 SimObject('CopyEngine.py')
39 SimObject('Device.py')
40 SimObject('DiskImage.py')
41 SimObject('Ethernet.py')
44 SimObject('Platform.py')
45 SimObject('SimpleDisk.py')
46 SimObject('Terminal.py')
50 Source('copy_engine.cc')
51 Source('disk_image.cc')
53 Source('etherdevice.cc')
54 Source('etherdump.cc')
56 Source('etherlink.cc')
59 Source('i8254xGBe.cc')
62 Source('intel_8254_timer.cc')
63 Source('io_device.cc')
67 Source('pciconfigall.cc')
72 Source('simple_disk.cc')
78 DebugFlag('DiskImageRead')
79 DebugFlag('DiskImageWrite')
81 DebugFlag('DMACopyEngine')
83 DebugFlag('EthernetCksum')
84 DebugFlag('EthernetDMA')
85 DebugFlag('EthernetData')
86 DebugFlag('EthernetDesc')
87 DebugFlag('EthernetEEPROM')
88 DebugFlag('EthernetIntr')
89 DebugFlag('EthernetPIO')
90 DebugFlag('EthernetSM')
93 DebugFlag('Intel8254Timer')
97 DebugFlag('PciConfigAll')
98 DebugFlag('SimpleDisk')
99 DebugFlag('SimpleDiskData')
100 DebugFlag('Terminal')
101 DebugFlag('TerminalVerbose')
104 CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ])
105 CompoundFlag('EthernetAll', [ 'Ethernet', 'EthernetPIO', 'EthernetDMA',
106 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM',
107 'EthernetCksum', 'EthernetEEPROM' ])
108 CompoundFlag('EthernetNoData', [ 'Ethernet', 'EthernetPIO', 'EthernetDesc',
109 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ])
110 CompoundFlag('IdeAll', [ 'IdeCtrl', 'IdeDisk' ])