2 * Copyright (c) 2010 ARM Limited
5 * The license below extends only to copyright in the software and shall
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8 * to a hardware implementation of the functionality of the software
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40 #include "base/intmath.hh"
41 #include "base/trace.hh"
42 #include "dev/arm/a9scu.hh"
43 #include "mem/packet.hh"
44 #include "mem/packet_access.hh"
45 #include "sim/system.hh"
47 A9SCU::A9SCU(Params
*p
)
48 : BasicPioDevice(p
, 0x60)
53 A9SCU::read(PacketPtr pkt
)
55 assert(pkt
->getAddr() >= pioAddr
&& pkt
->getAddr() < pioAddr
+ pioSize
);
56 assert(pkt
->getSize() == 4);
57 Addr daddr
= pkt
->getAddr() - pioAddr
;
61 pkt
->set(1); // SCU already enabled
64 /* Without making a completely new SCU, we can use the core count field
65 * as 4 bits and inform the OS of up to 16 CPUs. Although the core
66 * count is technically bits [1:0] only, bits [3:2] are SBZ for future
67 * expansion like this.
69 if (sys
->numContexts() > 4) {
70 warn_once("A9SCU with >4 CPUs is unsupported\n");
71 if (sys
->numContexts() > 15)
72 fatal("Too many CPUs (%d) for A9SCU!\n", sys
->numContexts());
74 int smp_bits
, core_cnt
;
75 smp_bits
= power(2,sys
->numContexts()) - 1;
76 core_cnt
= sys
->numContexts() - 1;
77 pkt
->set(smp_bits
<< 4 | core_cnt
);
80 // Only configuration register is implemented
81 panic("Tried to read SCU at offset %#x\n", daddr
);
84 pkt
->makeAtomicResponse();
90 A9SCU::write(PacketPtr pkt
)
92 assert(pkt
->getAddr() >= pioAddr
&& pkt
->getAddr() < pioAddr
+ pioSize
);
94 Addr daddr
= pkt
->getAddr() - pioAddr
;
97 // Nothing implemented at this point
98 panic("Tried to write SCU at offset %#x\n", daddr
);
101 pkt
->makeAtomicResponse();
106 A9SCUParams::create()
108 return new A9SCU(this);