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37 * Authors: Vasileios Spiliopoulos
39 * Stephan Diestelhorst
44 * The energy controller is a device being used to manage power and energy
45 * related control operations within the system. It provides the necessary
46 * software interface to the kernel. The kernel will require gem5 specific
47 * drivers to access this device.
49 * Tasks handled by the controller are:
50 * a) Dynamic voltage and frequency scaling control operations
52 * Note that the registers defined do not resemble any specific controller
53 * device in real hardware. They are currently design to accomodate the gem5
54 * system requirements.
57 #ifndef __DEV_ARM_ENERGY_CTRL_HH__
58 #define __DEV_ARM_ENERGY_CTRL_HH__
60 #include "dev/io_device.hh"
61 #include "params/EnergyCtrl.hh"
65 class EnergyCtrl : public BasicPioDevice
71 * * get basic DVFS handler information
72 * read(DVFS_HANDLER_STATUS)
73 * read(DVFS_HANDLER_TRANS_LATENCY)
75 * * get the number of domain IDs
76 * read(DVFS_NUM_DOMAINS) -> domains
78 * * query the driver to get the IDs for all i in domains
79 * write(DVFS_DOMAINID_AT_INDEX <- i)
80 * read(DOMAIN_ID) -> domainID_i
82 * * for each domainID i get voltage / frequency pairs
83 * write(DOMAIN_ID <- domainID_i)
84 * read(NUM_OF_PERF_LEVELS) -> levels_i
85 * * for each l in levels_i
86 * write(PERF_LEVEL_TO_READ <- l)
87 * read(FREQ_AT_PERF_LEVEL) -> freq_l_i
88 * read(VOLT_AT_PERF_LEVEL) -> volt_l_i
91 * Setting a specific performance level (V/F combination)
92 * ------------------------------------------------------
93 * * get performance for domain_ID i
94 * write(DOMAIN_ID <- i)
95 * read(PERF_LEVEL) -> perf_level_i
97 * * set performance for domain_ID i
98 * write(DOMAIN_ID <- i)
99 * write(PERF_LEVEL <- perf_level_i)
100 * * wait for DVFS transition completion
101 * while (!read(PERF_LEVEL_ACK));
105 DVFS_HANDLER_STATUS = 0,
107 DVFS_DOMAINID_AT_INDEX,
108 DVFS_HANDLER_TRANS_LATENCY,
119 typedef EnergyCtrlParams Params;
120 EnergyCtrl(const Params *p);
123 * Read command sent to the device
124 * @param pkt Packet describing this request
125 * @return number of ticks it took to complete
127 Tick read(PacketPtr pkt) override;
129 * Write command sent to the device
130 * @param pkt Packet describing this request
131 * @return number of ticks it took to complete
133 Tick write(PacketPtr pkt) override;
135 void serialize(CheckpointOut &cp) const override;
136 void unserialize(CheckpointIn &cp) override;
138 void startup() override;
139 void init() override;
142 DVFSHandler *dvfsHandler;
145 * Cluster ID (DOMAIN_ID) R/W register, programmed to ID of the domain for
146 * which the set/get performance level command can be issued
151 * Index for getting the domain ID from the domain ID list available with
154 uint32_t domainIDIndexToRead;
157 * Acknowledgment (PERF_LEVEL_ACK) RO register, software polls this
158 * register to read back the status of the last programmed change in the
159 * domain ID and/or the performance level. Valid values are:
160 * '0' - Ack is not OK yet
162 * It is a read destructive register with a read of '1' resets the ack to
165 uint32_t perfLevelAck;
167 uint32_t perfLevelToRead;
169 static uint32_t ticksTokHz(Tick period) {
170 return (uint32_t)(SimClock::Int::ms / period);
173 static uint32_t toMicroVolt(double voltage) {
174 return (uint32_t)(voltage * 1000000);
178 * Update the acknowledgment that is read back by the software to confirm
179 * newly requested performance level has been set.
185 EventWrapper<EnergyCtrl, &EnergyCtrl::updatePLAck> updateAckEvent;
187 #endif //__DEV_ARM_ENERGY_CTRL_HH__