src/dev/arm/generic_timer.hh

   1 /*
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   3  * All rights reserved.
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   5  * The license below extends only to copyright in the software and shall
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  12  * modified or unmodified, in source code or in binary form.
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  37
  38 #ifndef __DEV_ARM_GENERIC_TIMER_HH__
  39 #define __DEV_ARM_GENERIC_TIMER_HH__
  40
  41 #include "arch/arm/isa_device.hh"
  42 #include "arch/arm/system.hh"
  43 #include "base/bitunion.hh"
  44 #include "dev/arm/base_gic.hh"
  45 #include "sim/core.hh"
  46 #include "sim/sim_object.hh"
  47
  48 /// @file
  49 /// This module implements the global system counter and the local per-CPU
  50 /// architected timers as specified by the ARM Generic Timer extension (ARM
  51 /// ARM, Issue C, Chapter 17).
  52
  53 class Checkpoint;
  54 class GenericTimerParams;
  55 class GenericTimerMemParams;
  56
  57 /// Global system counter.  It is shared by the architected timers.
  58 /// @todo: implement memory-mapped controls
  59 class SystemCounter : public Serializable
  60 {
  61   protected:
  62     /// Counter frequency (as specified by CNTFRQ).
  63     uint32_t _freq;
  64     /// Frequency modes table with all possible frequencies for the counter
  65     std::vector<uint32_t> _freqTable;
  66     /// Cached copy of the counter period (inverse of the frequency).
  67     Tick _period;
  68     /// Tick when the counter was reset.
  69     Tick _resetTick;
  70
  71     /// Kernel event stream control register
  72     uint32_t _regCntkctl;
  73     /// Hypervisor event stream control register
  74     uint32_t _regCnthctl;
  75
  76     /// Maximum architectural number of frequency table entries
  77     static constexpr size_t MAX_FREQ_ENTRIES = 1004;
  78
  79   public:
  80     SystemCounter(std::vector<uint32_t> &freqs);
  81
  82     /// Returns the current value of the physical counter.
  83     uint64_t value() const
  84     {
  85         if (_freq == 0)
  86             return 0;  // Counter is still off.
  87         return (curTick() - _resetTick) / _period;
  88     }
  89
  90     /// Returns the counter frequency.
  91     uint32_t freq() const { return _freq; }
  92     /// Sets the counter frequency.
  93     /// @param freq frequency in Hz.
  94     void setFreq(uint32_t freq);
  95
  96     /// Returns the counter period.
  97     Tick period() const { return _period; }
  98
  99     void setKernelControl(uint32_t val) { _regCntkctl = val; }
 100     uint32_t getKernelControl() { return _regCntkctl; }
 101
 102     void setHypControl(uint32_t val) { _regCnthctl = val; }
 103     uint32_t getHypControl() { return _regCnthctl; }
 104
 105     void serialize(CheckpointOut &cp) const override;
 106     void unserialize(CheckpointIn &cp) override;
 107
 108   private:
 109     // Disable copying
 110     SystemCounter(const SystemCounter &c);
 111 };
 112
 113 /// Per-CPU architected timer.
 114 class ArchTimer : public Serializable, public Drainable
 115 {
 116   protected:
 117     /// Control register.
 118     BitUnion32(ArchTimerCtrl)
 119     Bitfield<0> enable;
 120     Bitfield<1> imask;
 121     Bitfield<2> istatus;
 122     EndBitUnion(ArchTimerCtrl)
 123
 124     /// Name of this timer.
 125     const std::string _name;
 126
 127     /// Pointer to parent class.
 128     SimObject &_parent;
 129
 130     SystemCounter &_systemCounter;
 131
 132     ArmInterruptPin * const _interrupt;
 133
 134     /// Value of the control register ({CNTP/CNTHP/CNTV}_CTL).
 135     ArchTimerCtrl _control;
 136     /// Programmed limit value for the upcounter ({CNTP/CNTHP/CNTV}_CVAL).
 137     uint64_t _counterLimit;
 138     /// Offset relative to the physical timer (CNTVOFF)
 139     uint64_t _offset;
 140
 141     /**
 142      * Timer settings or the offset has changed, re-evaluate
 143      * trigger condition and raise interrupt if necessary.
 144      */
 145     void updateCounter();
 146
 147     /// Called when the upcounter reaches the programmed value.
 148     void counterLimitReached();
 149     EventFunctionWrapper _counterLimitReachedEvent;
 150
 151     virtual bool scheduleEvents() { return true; }
 152
 153   public:
 154     ArchTimer(const std::string &name,
 155               SimObject &parent,
 156               SystemCounter &sysctr,
 157               ArmInterruptPin *interrupt);
 158
 159     /// Returns the timer name.
 160     std::string name() const { return _name; }
 161
 162     /// Returns the CompareValue view of the timer.
 163     uint64_t compareValue() const { return _counterLimit; }
 164     /// Sets the CompareValue view of the timer.
 165     void setCompareValue(uint64_t val);
 166
 167     /// Returns the TimerValue view of the timer.
 168     uint32_t timerValue() const { return _counterLimit - value(); }
 169     /// Sets the TimerValue view of the timer.
 170     void setTimerValue(uint32_t val);
 171
 172     /// Sets the control register.
 173     uint32_t control() const { return _control; }
 174     void setControl(uint32_t val);
 175
 176     uint64_t offset() const { return _offset; }
 177     void setOffset(uint64_t val);
 178
 179     /// Returns the value of the counter which this timer relies on.
 180     uint64_t value() const;
 181
 182     // Serializable
 183     void serialize(CheckpointOut &cp) const override;
 184     void unserialize(CheckpointIn &cp) override;
 185
 186     // Drainable
 187     DrainState drain() override;
 188     void drainResume() override;
 189
 190   private:
 191     // Disable copying
 192     ArchTimer(const ArchTimer &t);
 193 };
 194
 195 class ArchTimerKvm : public ArchTimer
 196 {
 197   private:
 198     ArmSystem &system;
 199
 200   public:
 201     ArchTimerKvm(const std::string &name,
 202                  ArmSystem &system,
 203                  SimObject &parent,
 204                  SystemCounter &sysctr,
 205                  ArmInterruptPin *interrupt)
 206       : ArchTimer(name, parent, sysctr, interrupt), system(system) {}
 207
 208   protected:
 209     // For ArchTimer's in a GenericTimerISA with Kvm execution about
 210     // to begin, skip rescheduling the event.
 211     // Otherwise, we should reschedule the event (if necessary).
 212     bool scheduleEvents() override {
 213         return !system.validKvmEnvironment();
 214     }
 215 };
 216
 217 class GenericTimer : public ClockedObject
 218 {
 219   public:
 220     const GenericTimerParams * params() const;
 221
 222     GenericTimer(GenericTimerParams *p);
 223
 224     void serialize(CheckpointOut &cp) const override;
 225     void unserialize(CheckpointIn &cp) override;
 226
 227   public:
 228     void setMiscReg(int misc_reg, unsigned cpu, RegVal val);
 229     RegVal readMiscReg(int misc_reg, unsigned cpu);
 230
 231   protected:
 232     struct CoreTimers {
 233         CoreTimers(GenericTimer &parent, ArmSystem &system, unsigned cpu,
 234                    ArmInterruptPin *_irqPhysS, ArmInterruptPin *_irqPhysNS,
 235                    ArmInterruptPin *_irqVirt, ArmInterruptPin *_irqHyp)
 236             : irqPhysS(_irqPhysS),
 237               irqPhysNS(_irqPhysNS),
 238               irqVirt(_irqVirt),
 239               irqHyp(_irqHyp),
 240               physS(csprintf("%s.phys_s_timer%d", parent.name(), cpu),
 241                      system, parent, parent.systemCounter,
 242                      _irqPhysS),
 243               // This should really be phys_timerN, but we are stuck with
 244               // arch_timer for backwards compatibility.
 245               physNS(csprintf("%s.arch_timer%d", parent.name(), cpu),
 246                      system, parent, parent.systemCounter,
 247                      _irqPhysNS),
 248               virt(csprintf("%s.virt_timer%d", parent.name(), cpu),
 249                    system, parent, parent.systemCounter,
 250                    _irqVirt),
 251               hyp(csprintf("%s.hyp_timer%d", parent.name(), cpu),
 252                    system, parent, parent.systemCounter,
 253                    _irqHyp)
 254         {}
 255
 256         ArmInterruptPin const *irqPhysS;
 257         ArmInterruptPin const *irqPhysNS;
 258         ArmInterruptPin const *irqVirt;
 259         ArmInterruptPin const *irqHyp;
 260
 261         ArchTimerKvm physS;
 262         ArchTimerKvm physNS;
 263         ArchTimerKvm virt;
 264         ArchTimerKvm hyp;
 265
 266       private:
 267         // Disable copying
 268         CoreTimers(const CoreTimers &c);
 269     };
 270
 271     CoreTimers &getTimers(int cpu_id);
 272     void createTimers(unsigned cpus);
 273
 274     /// System counter.
 275     SystemCounter systemCounter;
 276
 277     /// Per-CPU physical architected timers.
 278     std::vector<std::unique_ptr<CoreTimers>> timers;
 279
 280   protected: // Configuration
 281     /// ARM system containing this timer
 282     ArmSystem &system;
 283 };
 284
 285 class GenericTimerISA : public ArmISA::BaseISADevice
 286 {
 287   public:
 288     GenericTimerISA(GenericTimer &_parent, unsigned _cpu)
 289         : parent(_parent), cpu(_cpu) {}
 290
 291     void setMiscReg(int misc_reg, RegVal val) override;
 292     RegVal readMiscReg(int misc_reg) override;
 293
 294   protected:
 295     GenericTimer &parent;
 296     unsigned cpu;
 297 };
 298
 299 class GenericTimerMem : public PioDevice
 300 {
 301   public:
 302     GenericTimerMem(GenericTimerMemParams *p);
 303
 304     void serialize(CheckpointOut &cp) const override;
 305     void unserialize(CheckpointIn &cp) override;
 306
 307   public: // PioDevice
 308     AddrRangeList getAddrRanges() const override { return addrRanges; }
 309     Tick read(PacketPtr pkt) override;
 310     Tick write(PacketPtr pkt) override;
 311
 312   protected:
 313     uint64_t ctrlRead(Addr addr, size_t size) const;
 314     void ctrlWrite(Addr addr, size_t size, uint64_t value);
 315
 316     uint64_t timerRead(Addr addr, size_t size) const;
 317     void timerWrite(Addr addr, size_t size, uint64_t value);
 318
 319   protected: // Registers
 320     static const Addr CTRL_CNTFRQ          = 0x000;
 321     static const Addr CTRL_CNTNSAR         = 0x004;
 322     static const Addr CTRL_CNTTIDR         = 0x008;
 323     static const Addr CTRL_CNTACR_BASE     = 0x040;
 324     static const Addr CTRL_CNTVOFF_LO_BASE = 0x080;
 325     static const Addr CTRL_CNTVOFF_HI_BASE = 0x084;
 326
 327     static const Addr TIMER_CNTPCT_LO    = 0x000;
 328     static const Addr TIMER_CNTPCT_HI    = 0x004;
 329     static const Addr TIMER_CNTVCT_LO    = 0x008;
 330     static const Addr TIMER_CNTVCT_HI    = 0x00C;
 331     static const Addr TIMER_CNTFRQ       = 0x010;
 332     static const Addr TIMER_CNTEL0ACR    = 0x014;
 333     static const Addr TIMER_CNTVOFF_LO   = 0x018;
 334     static const Addr TIMER_CNTVOFF_HI   = 0x01C;
 335     static const Addr TIMER_CNTP_CVAL_LO = 0x020;
 336     static const Addr TIMER_CNTP_CVAL_HI = 0x024;
 337     static const Addr TIMER_CNTP_TVAL    = 0x028;
 338     static const Addr TIMER_CNTP_CTL     = 0x02C;
 339     static const Addr TIMER_CNTV_CVAL_LO = 0x030;
 340     static const Addr TIMER_CNTV_CVAL_HI = 0x034;
 341     static const Addr TIMER_CNTV_TVAL    = 0x038;
 342     static const Addr TIMER_CNTV_CTL     = 0x03C;
 343
 344   protected: // Params
 345     const AddrRange ctrlRange;
 346     const AddrRange timerRange;
 347     const AddrRangeList addrRanges;
 348
 349   protected:
 350     /// System counter.
 351     SystemCounter systemCounter;
 352     ArchTimer physTimer;
 353     ArchTimer virtTimer;
 354 };
 355
 356 #endif // __DEV_ARM_GENERIC_TIMER_HH__