src/dev/arm/rv_ctrl.hh

   1 /*
   2  * Copyright (c) 2010 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
  16  * met: redistributions of source code must retain the above copyright
  17  * notice, this list of conditions and the following disclaimer;
  18  * redistributions in binary form must reproduce the above copyright
  19  * notice, this list of conditions and the following disclaimer in the
  20  * documentation and/or other materials provided with the distribution;
  21  * neither the name of the copyright holders nor the names of its
  22  * contributors may be used to endorse or promote products derived from
  23  * this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  *
  37  * Authors: Ali Saidi
  38  */
  39
  40 #ifndef __DEV_ARM_RV_HH__
  41 #define __DEV_ARM_RV_HH__
  42
  43 #include "base/bitunion.hh"
  44 #include "base/range.hh"
  45 #include "dev/io_device.hh"
  46 #include "params/RealViewCtrl.hh"
  47
  48 /** @file
  49  * This implements the simple real view registers on a PBXA9
  50  */
  51
  52 class RealViewCtrl : public BasicPioDevice
  53 {
  54   protected:
  55     enum {
  56         IdReg      = 0x00,
  57         SwReg      = 0x04,
  58         Led        = 0x08,
  59         Osc0       = 0x0C,
  60         Osc1       = 0x10,
  61         Osc2       = 0x14,
  62         Osc3       = 0x18,
  63         Osc4       = 0x1C,
  64         Lock       = 0x20,
  65         Clock100   = 0x24,
  66         CfgData1   = 0x28,
  67         CfgData2   = 0x2C,
  68         Flags      = 0x30,
  69         FlagsClr   = 0x34,
  70         NvFlags    = 0x38,
  71         NvFlagsClr = 0x3C,
  72         ResetCtl   = 0x40,
  73         PciCtl     = 0x44,
  74         MciCtl     = 0x48,
  75         Flash      = 0x4C,
  76         Clcd       = 0x50,
  77         ClcdSer    = 0x54,
  78         Bootcs     = 0x58,
  79         Clock24    = 0x5C,
  80         Misc       = 0x60,
  81         IoSel      = 0x70,
  82         ProcId     = 0x84,
  83         TestOsc0   = 0xC0,
  84         TestOsc1   = 0xC4,
  85         TestOsc2   = 0xC8,
  86         TestOsc3   = 0xCC,
  87         TestOsc4   = 0xD0
  88     };
  89
  90     // system lock value
  91     BitUnion32(SysLockReg)
  92         Bitfield<15,0> lockVal;
  93         Bitfield<16> locked;
  94     EndBitUnion(SysLockReg)
  95
  96     SysLockReg sysLock;
  97
  98     /** This register is used for smp booting.
  99      * The primary cpu writes the secondary start address here before
 100      * sends it a soft interrupt. The secondary cpu reads this register and if
 101      * it's non-zero it jumps to the address
 102      */
 103     uint32_t flags;
 104
 105   public:
 106     typedef RealViewCtrlParams Params;
 107     const Params *
 108     params() const
 109     {
 110         return dynamic_cast<const Params *>(_params);
 111     }
 112     /**
 113       * The constructor for RealView just registers itself with the MMU.
 114       * @param p params structure
 115       */
 116     RealViewCtrl(Params *p);
 117
 118     /**
 119      * Handle a read to the device
 120      * @param pkt The memory request.
 121      * @param data Where to put the data.
 122      */
 123     virtual Tick read(PacketPtr pkt);
 124
 125     /**
 126      * All writes are simply ignored.
 127      * @param pkt The memory request.
 128      * @param data the data
 129      */
 130     virtual Tick write(PacketPtr pkt);
 131
 132
 133     virtual void serialize(std::ostream &os);
 134     virtual void unserialize(Checkpoint *cp, const std::string &section);
 135 };
 136
 137
 138 #endif // __DEV_ARM_RV_HH__