dev: Delete the authors list from files in src/dev.
[gem5.git] / src / dev / arm / rv_ctrl.hh
1 /*
2 * Copyright (c) 2010,2013,2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 #ifndef __DEV_ARM_RV_HH__
39 #define __DEV_ARM_RV_HH__
40
41 #include "base/bitunion.hh"
42 #include "dev/io_device.hh"
43 #include "params/RealViewCtrl.hh"
44 #include "params/RealViewOsc.hh"
45 #include "params/RealViewTemperatureSensor.hh"
46
47 /** @file
48 * This implements the simple real view registers on a PBXA9
49 */
50
51 class RealViewCtrl : public BasicPioDevice
52 {
53 public:
54 enum DeviceFunc {
55 FUNC_OSC = 1,
56 FUNC_VOLT = 2,
57 FUNC_AMP = 3,
58 FUNC_TEMP = 4,
59 FUNC_RESET = 5,
60 FUNC_SCC = 6,
61 FUNC_MUXFPGA = 7,
62 FUNC_SHUTDOWN = 8,
63 FUNC_REBOOT = 9,
64 FUNC_DVIMODE = 11,
65 FUNC_POWER = 12,
66 FUNC_ENERGY = 13,
67 };
68
69 class Device
70 {
71 public:
72 Device(RealViewCtrl &parent, DeviceFunc func,
73 uint8_t site, uint8_t pos, uint8_t dcc, uint16_t dev)
74 {
75 parent.registerDevice(func, site, pos, dcc, dev, this);
76 }
77
78 virtual ~Device() {}
79
80 virtual uint32_t read() const = 0;
81 virtual void write(uint32_t value) = 0;
82 };
83
84 protected:
85 enum {
86 IdReg = 0x00,
87 SwReg = 0x04,
88 Led = 0x08,
89 Osc0 = 0x0C,
90 Osc1 = 0x10,
91 Osc2 = 0x14,
92 Osc3 = 0x18,
93 Osc4 = 0x1C,
94 Lock = 0x20,
95 Clock100 = 0x24,
96 CfgData1 = 0x28,
97 CfgData2 = 0x2C,
98 Flags = 0x30,
99 FlagsClr = 0x34,
100 NvFlags = 0x38,
101 NvFlagsClr = 0x3C,
102 ResetCtl = 0x40,
103 PciCtl = 0x44,
104 MciCtl = 0x48,
105 Flash = 0x4C,
106 Clcd = 0x50,
107 ClcdSer = 0x54,
108 Bootcs = 0x58,
109 Clock24 = 0x5C,
110 Misc = 0x60,
111 IoSel = 0x70,
112 ProcId0 = 0x84,
113 ProcId1 = 0x88,
114 CfgData = 0xA0,
115 CfgCtrl = 0xA4,
116 CfgStat = 0xA8,
117 TestOsc0 = 0xC0,
118 TestOsc1 = 0xC4,
119 TestOsc2 = 0xC8,
120 TestOsc3 = 0xCC,
121 TestOsc4 = 0xD0
122 };
123
124 // system lock value
125 BitUnion32(SysLockReg)
126 Bitfield<15,0> lockVal;
127 Bitfield<16> locked;
128 EndBitUnion(SysLockReg)
129
130 BitUnion32(CfgCtrlReg)
131 Bitfield<11, 0> dev;
132 Bitfield<15, 12> pos;
133 Bitfield<17, 16> site;
134 Bitfield<25, 20> func;
135 Bitfield<29, 26> dcc;
136 Bitfield<30> wr;
137 Bitfield<31> start;
138 EndBitUnion(CfgCtrlReg)
139
140 static const uint32_t CFG_CTRL_ADDR_MASK = 0x3fffffffUL;
141
142 SysLockReg sysLock;
143
144 /** This register is used for smp booting.
145 * The primary cpu writes the secondary start address here before
146 * sends it a soft interrupt. The secondary cpu reads this register and if
147 * it's non-zero it jumps to the address
148 */
149 uint32_t flags;
150
151 /** This register contains the result from a system control reg access
152 */
153 uint32_t scData;
154
155 public:
156 typedef RealViewCtrlParams Params;
157 const Params *
158 params() const
159 {
160 return dynamic_cast<const Params *>(_params);
161 }
162 /**
163 * The constructor for RealView just registers itself with the MMU.
164 * @param p params structure
165 */
166 RealViewCtrl(Params *p);
167
168 /**
169 * Handle a read to the device
170 * @param pkt The memory request.
171 * @param data Where to put the data.
172 */
173 Tick read(PacketPtr pkt) override;
174
175 /**
176 * All writes are simply ignored.
177 * @param pkt The memory request.
178 * @param data the data
179 */
180 Tick write(PacketPtr pkt) override;
181
182 void serialize(CheckpointOut &cp) const override;
183 void unserialize(CheckpointIn &cp) override;
184
185 public:
186 void registerDevice(DeviceFunc func, uint8_t site, uint8_t pos,
187 uint8_t dcc, uint16_t dev,
188 Device *handler);
189
190 protected:
191 std::map<uint32_t, Device *> devices;
192 };
193
194 /**
195 * This is an implementation of a programmable oscillator on the that
196 * can be configured through the RealView/Versatile Express
197 * configuration interface.
198 *
199 * See ARM DUI 0447J (ARM Motherboard Express uATX -- V2M-P1).
200 */
201 class RealViewOsc
202 : public ClockDomain, RealViewCtrl::Device
203 {
204 public:
205 RealViewOsc(RealViewOscParams *p);
206 virtual ~RealViewOsc() {};
207
208 void startup() override;
209
210 void serialize(CheckpointOut &cp) const override;
211 void unserialize(CheckpointIn &cp) override;
212
213 public: // RealViewCtrl::Device interface
214 uint32_t read() const override;
215 void write(uint32_t freq) override;
216
217 protected:
218 void clockPeriod(Tick clock_period);
219 };
220
221 /**
222 * This device implements the temperature sensor used in the
223 * RealView/Versatile Express platform.
224 *
225 * See ARM DUI 0447J (ARM Motherboard Express uATX -- V2M-P1).
226 */
227 class RealViewTemperatureSensor
228 : public SimObject, RealViewCtrl::Device
229 {
230 public:
231 RealViewTemperatureSensor(RealViewTemperatureSensorParams *p)
232 : SimObject(p),
233 RealViewCtrl::Device(*p->parent, RealViewCtrl::FUNC_TEMP,
234 p->site, p->position, p->dcc, p->device),
235 system(p->system)
236 {}
237 virtual ~RealViewTemperatureSensor() {};
238
239 public: // RealViewCtrl::Device interface
240 uint32_t read() const override;
241 void write(uint32_t temp) override {}
242
243 protected:
244 /** The system this RV device belongs to */
245 System * system;
246 };
247
248
249 #endif // __DEV_ARM_RV_HH__