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46 #include "dev/dma_device.hh"
50 #include "base/chunk_generator.hh"
51 #include "debug/DMA.hh"
52 #include "debug/Drain.hh"
53 #include "sim/system.hh"
55 DmaPort::DmaPort(MemObject
*dev
, System
*s
)
56 : MasterPort(dev
->name() + ".dma", dev
),
57 device(dev
), sys(s
), masterId(s
->getMasterId(dev
->name())),
58 sendEvent(this), pendingCount(0), inRetry(false)
62 DmaPort::handleResp(PacketPtr pkt
, Tick delay
)
64 // should always see a response with a sender state
65 assert(pkt
->isResponse());
67 // get the DMA sender state
68 DmaReqState
*state
= dynamic_cast<DmaReqState
*>(pkt
->senderState
);
71 DPRINTF(DMA
, "Received response %s for addr: %#x size: %d nb: %d," \
72 " tot: %d sched %d\n",
73 pkt
->cmdString(), pkt
->getAddr(), pkt
->req
->getSize(),
74 state
->numBytes
, state
->totBytes
,
75 state
->completionEvent
?
76 state
->completionEvent
->scheduled() : 0);
78 assert(pendingCount
!= 0);
81 // update the number of bytes received based on the request rather
82 // than the packet as the latter could be rounded up to line sizes
83 state
->numBytes
+= pkt
->req
->getSize();
84 assert(state
->totBytes
>= state
->numBytes
);
86 // if we have reached the total number of bytes for this DMA
87 // request, then signal the completion and delete the sate
88 if (state
->totBytes
== state
->numBytes
) {
89 if (state
->completionEvent
) {
90 delay
+= state
->delay
;
91 device
->schedule(state
->completionEvent
, curTick() + delay
);
96 // delete the request that we created and also the packet
100 // we might be drained at this point, if so signal the drain event
101 if (pendingCount
== 0)
106 DmaPort::recvTimingResp(PacketPtr pkt
)
108 // We shouldn't ever get a cacheable block in Modified state
109 assert(pkt
->req
->isUncacheable() ||
110 !(pkt
->cacheResponding() && !pkt
->hasSharers()));
117 DmaDevice::DmaDevice(const Params
*p
)
118 : PioDevice(p
), dmaPort(this, sys
)
124 if (!dmaPort
.isConnected())
125 panic("DMA port of %s not connected to anything!", name());
132 if (pendingCount
== 0) {
133 return DrainState::Drained
;
135 DPRINTF(Drain
, "DmaPort not drained\n");
136 return DrainState::Draining
;
141 DmaPort::recvReqRetry()
143 assert(transmitList
.size());
148 DmaPort::dmaAction(Packet::Command cmd
, Addr addr
, int size
, Event
*event
,
149 uint8_t *data
, Tick delay
, Request::Flags flag
)
151 // one DMA request sender state for every action, that is then
152 // split into many requests and packets based on the block size,
153 // i.e. cache line size
154 DmaReqState
*reqState
= new DmaReqState(event
, size
, delay
);
156 // (functionality added for Table Walker statistics)
157 // We're only interested in this when there will only be one request.
158 // For simplicity, we return the last request, which would also be
159 // the only request in that case.
160 RequestPtr req
= NULL
;
162 DPRINTF(DMA
, "Starting DMA for addr: %#x size: %d sched: %d\n", addr
, size
,
163 event
? event
->scheduled() : -1);
164 for (ChunkGenerator
gen(addr
, size
, sys
->cacheLineSize());
165 !gen
.done(); gen
.next()) {
166 req
= new Request(gen
.addr(), gen
.size(), flag
, masterId
);
167 req
->taskId(ContextSwitchTaskId::DMA
);
168 PacketPtr pkt
= new Packet(req
, cmd
);
170 // Increment the data pointer on a write
172 pkt
->dataStatic(data
+ gen
.complete());
174 pkt
->senderState
= reqState
;
176 DPRINTF(DMA
, "--Queuing DMA for addr: %#x size: %d\n", gen
.addr(),
181 // in zero time also initiate the sending of the packets we have
182 // just created, for atomic this involves actually completing all
190 DmaPort::queueDma(PacketPtr pkt
)
192 transmitList
.push_back(pkt
);
194 // remember that we have another packet pending, this will only be
195 // decremented once a response comes back
200 DmaPort::trySendTimingReq()
202 // send the first packet on the transmit list and schedule the
203 // following send if it is successful
204 PacketPtr pkt
= transmitList
.front();
206 DPRINTF(DMA
, "Trying to send %s addr %#x\n", pkt
->cmdString(),
209 inRetry
= !sendTimingReq(pkt
);
211 transmitList
.pop_front();
212 DPRINTF(DMA
, "-- Done\n");
213 // if there is more to do, then do so
214 if (!transmitList
.empty())
215 // this should ultimately wait for as many cycles as the
216 // device needs to send the packet, but currently the port
217 // does not have any known width so simply wait a single
219 device
->schedule(sendEvent
, device
->clockEdge(Cycles(1)));
221 DPRINTF(DMA
, "-- Failed, waiting for retry\n");
224 DPRINTF(DMA
, "TransmitList: %d, inRetry: %d\n",
225 transmitList
.size(), inRetry
);
231 // some kind of selcetion between access methods
232 // more work is going to have to be done to make
233 // switching actually work
234 assert(transmitList
.size());
236 if (sys
->isTimingMode()) {
237 // if we are either waiting for a retry or are still waiting
238 // after sending the last packet, then do not proceed
239 if (inRetry
|| sendEvent
.scheduled()) {
240 DPRINTF(DMA
, "Can't send immediately, waiting to send\n");
245 } else if (sys
->isAtomicMode()) {
246 // send everything there is to send in zero time
247 while (!transmitList
.empty()) {
248 PacketPtr pkt
= transmitList
.front();
249 transmitList
.pop_front();
251 DPRINTF(DMA
, "Sending DMA for addr: %#x size: %d\n",
252 pkt
->req
->getPaddr(), pkt
->req
->getSize());
253 Tick lat
= sendAtomic(pkt
);
255 handleResp(pkt
, lat
);
258 panic("Unknown memory mode.");
262 DmaDevice::getMasterPort(const std::string
&if_name
, PortID idx
)
264 if (if_name
== "dma") {
267 return PioDevice::getMasterPort(if_name
, idx
);
274 DmaReadFifo::DmaReadFifo(DmaPort
&_port
, size_t size
,
275 unsigned max_req_size
,
276 unsigned max_pending
,
277 Request::Flags flags
)
278 : maxReqSize(max_req_size
), fifoSize(size
),
279 reqFlags(flags
), port(_port
),
281 nextAddr(0), endAddr(0)
283 freeRequests
.resize(max_pending
);
284 for (auto &e
: freeRequests
)
285 e
.reset(new DmaDoneEvent(this, max_req_size
));
289 DmaReadFifo::~DmaReadFifo()
291 for (auto &p
: pendingRequests
) {
292 DmaDoneEvent
*e(p
.release());
297 // We can't kill in-flight DMAs, so we'll just transfer
298 // ownership to the event queue so that they get freed
299 // when they are done.
306 DmaReadFifo::serialize(CheckpointOut
&cp
) const
308 assert(pendingRequests
.empty());
310 SERIALIZE_CONTAINER(buffer
);
311 SERIALIZE_SCALAR(endAddr
);
312 SERIALIZE_SCALAR(nextAddr
);
316 DmaReadFifo::unserialize(CheckpointIn
&cp
)
318 UNSERIALIZE_CONTAINER(buffer
);
319 UNSERIALIZE_SCALAR(endAddr
);
320 UNSERIALIZE_SCALAR(nextAddr
);
324 DmaReadFifo::tryGet(uint8_t *dst
, size_t len
)
326 if (buffer
.size() >= len
) {
327 buffer
.read(dst
, len
);
336 DmaReadFifo::get(uint8_t *dst
, size_t len
)
338 const bool success(tryGet(dst
, len
));
339 panic_if(!success
, "Buffer underrun in DmaReadFifo::get()\n");
343 DmaReadFifo::startFill(Addr start
, size_t size
)
345 assert(atEndOfBlock());
348 endAddr
= start
+ size
;
353 DmaReadFifo::stopFill()
355 // Prevent new DMA requests by setting the next address to the end
356 // address. Pending requests will still complete.
359 // Flag in-flight accesses as canceled. This prevents their data
360 // from being written to the FIFO.
361 for (auto &p
: pendingRequests
)
366 DmaReadFifo::resumeFill()
368 // Don't try to fetch more data if we are draining. This ensures
369 // that the DMA engine settles down before we checkpoint it.
370 if (drainState() == DrainState::Draining
)
373 const bool old_eob(atEndOfBlock());
374 size_t size_pending(0);
375 for (auto &e
: pendingRequests
)
376 size_pending
+= e
->requestSize();
378 while (!freeRequests
.empty() && !atEndOfBlock()) {
379 const size_t req_size(std::min(maxReqSize
, endAddr
- nextAddr
));
380 if (buffer
.size() + size_pending
+ req_size
> fifoSize
)
383 DmaDoneEventUPtr
event(std::move(freeRequests
.front()));
384 freeRequests
.pop_front();
387 event
->reset(req_size
);
388 port
.dmaAction(MemCmd::ReadReq
, nextAddr
, req_size
, event
.get(),
389 event
->data(), 0, reqFlags
);
390 nextAddr
+= req_size
;
391 size_pending
+= req_size
;
393 pendingRequests
.emplace_back(std::move(event
));
396 // EOB can be set before a call to dmaDone() if in-flight accesses
397 // have been canceled.
398 if (!old_eob
&& atEndOfBlock())
403 DmaReadFifo::dmaDone()
405 const bool old_active(isActive());
410 if (!old_active
&& isActive())
415 DmaReadFifo::handlePending()
417 while (!pendingRequests
.empty() && pendingRequests
.front()->done()) {
418 // Get the first finished pending request
419 DmaDoneEventUPtr
event(std::move(pendingRequests
.front()));
420 pendingRequests
.pop_front();
422 if (!event
->canceled())
423 buffer
.write(event
->data(), event
->requestSize());
425 // Move the event to the list of free requests
426 freeRequests
.emplace_back(std::move(event
));
429 if (pendingRequests
.empty())
438 return pendingRequests
.empty() ? DrainState::Drained
: DrainState::Draining
;
442 DmaReadFifo::DmaDoneEvent::DmaDoneEvent(DmaReadFifo
*_parent
,
444 : parent(_parent
), _done(false), _canceled(false), _data(max_size
, 0)
449 DmaReadFifo::DmaDoneEvent::kill()
452 setFlags(AutoDelete
);
456 DmaReadFifo::DmaDoneEvent::cancel()
462 DmaReadFifo::DmaDoneEvent::reset(size_t size
)
464 assert(size
<= _data
.size());
471 DmaReadFifo::DmaDoneEvent::process()