src/dev/dma_device.hh

   1 /*
   2  * Copyright (c) 2012 ARM Limited
   3  * All rights reserved.
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2004-2005 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  *
  40  * Authors: Ali Saidi
  41  *          Nathan Binkert
  42  */
  43
  44 #ifndef __DEV_DMA_DEVICE_HH__
  45 #define __DEV_DMA_DEVICE_HH__
  46
  47 #include "dev/io_device.hh"
  48 #include "params/DmaDevice.hh"
  49
  50 class DmaPort : public MasterPort
  51 {
  52   protected:
  53     struct DmaReqState : public Packet::SenderState
  54     {
  55         /** Event to call on the device when this transaction (all packets)
  56          * complete. */
  57         Event *completionEvent;
  58
  59         /** Total number of bytes that this transaction involves. */
  60         Addr totBytes;
  61
  62         /** Number of bytes that have been acked for this transaction. */
  63         Addr numBytes;
  64
  65         /** Amount to delay completion of dma by */
  66         Tick delay;
  67
  68         DmaReqState(Event *ce, Addr tb, Tick _delay)
  69             : completionEvent(ce), totBytes(tb), numBytes(0), delay(_delay)
  70         {}
  71     };
  72
  73     MemObject *device;
  74     std::list<PacketPtr> transmitList;
  75
  76     /** The system that device/port are in. This is used to select which mode
  77      * we are currently operating in. */
  78     System *sys;
  79
  80     /** Id for all requests */
  81     MasterID masterId;
  82
  83     /** Number of outstanding packets the dma port has. */
  84     int pendingCount;
  85
  86     /** If we need to drain, keep the drain event around until we're done
  87      * here.*/
  88     Event *drainEvent;
  89
  90     /** If the port is currently waiting for a retry before it can send whatever
  91      * it is that it's sending. */
  92     bool inRetry;
  93
  94     virtual bool recvTimingResp(PacketPtr pkt);
  95
  96     virtual void recvRetry() ;
  97
  98     void queueDma(PacketPtr pkt, bool front = false);
  99     void sendDma();
 100
 101   public:
 102
 103     DmaPort(MemObject *dev, System *s);
 104
 105     void dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
 106                    uint8_t *data, Tick delay, Request::Flags flag = 0);
 107
 108     bool dmaPending() { return pendingCount > 0; }
 109
 110     unsigned cacheBlockSize() const { return peerBlockSize(); }
 111     unsigned int drain(Event *de);
 112 };
 113
 114 class DmaDevice : public PioDevice
 115 {
 116    protected:
 117     DmaPort dmaPort;
 118
 119   public:
 120     typedef DmaDeviceParams Params;
 121     DmaDevice(const Params *p);
 122     virtual ~DmaDevice();
 123
 124     const Params *
 125     params() const
 126     {
 127         return dynamic_cast<const Params *>(_params);
 128     }
 129
 130     void dmaWrite(Addr addr, int size, Event *event, uint8_t *data,
 131                   Tick delay = 0)
 132     {
 133         dmaPort.dmaAction(MemCmd::WriteReq, addr, size, event, data, delay);
 134     }
 135
 136     void dmaRead(Addr addr, int size, Event *event, uint8_t *data,
 137                  Tick delay = 0)
 138     {
 139         dmaPort.dmaAction(MemCmd::ReadReq, addr, size, event, data, delay);
 140     }
 141
 142     bool dmaPending() { return dmaPort.dmaPending(); }
 143
 144     virtual void init();
 145
 146     virtual unsigned int drain(Event *de);
 147
 148     unsigned cacheBlockSize() const { return dmaPort.cacheBlockSize(); }
 149
 150     virtual MasterPort &getMasterPort(const std::string &if_name,
 151                                       int idx = -1);
 152
 153     friend class DmaPort;
 154 };
 155
 156 #endif // __DEV_DMA_DEVICE_HH__