src/dev/hsa/hsa_queue.hh

   1 /*
   2  * Copyright (c) 2016-2017 Advanced Micro Devices, Inc.
   3  * All rights reserved.
   4  *
   5  * For use for simulation and test purposes only
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  * 1. Redistributions of source code must retain the above copyright notice,
  11  * this list of conditions and the following disclaimer.
  12  *
  13  * 2. Redistributions in binary form must reproduce the above copyright notice,
  14  * this list of conditions and the following disclaimer in the documentation
  15  * and/or other materials provided with the distribution.
  16  *
  17  * 3. Neither the name of the copyright holder nor the names of its
  18  * contributors may be used to endorse or promote products derived from this
  19  * software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  * Authors: Anthony Gutierrez
  34  */
  35
  36 #ifndef __DEV_HSA_HSA_QUEUE_HH__
  37 #define __DEV_HSA_HSA_QUEUE_HH__
  38
  39 #include <cstdint>
  40
  41 typedef enum
  42 {
  43     _HSA_QUEUE_TYPE_MULTI = 0,
  44     _HSA_QUEUE_TYPE_SINGLE = 1
  45 } _hsa_queue_type_t;
  46
  47 typedef struct _hsa_signal_s
  48 {
  49     uint64_t handle;
  50 } _hsa_signal_t;
  51
  52 typedef struct _hsa_queue_s
  53 {
  54     _hsa_queue_type_t type;
  55     uint32_t features;
  56     void *base_address;
  57     _hsa_signal_t doorbell_signal;
  58     uint32_t size;
  59     uint32_t reserved1;
  60     uint64_t id;
  61 } _hsa_queue_t;
  62
  63 typedef uint32_t _amd_queue_properties32_t;
  64
  65 typedef struct _amd_queue_s
  66 {
  67     _hsa_queue_t hsa_queue;
  68     uint32_t reserved1[4];
  69     volatile uint64_t write_dispatch_id;
  70     uint32_t group_segment_aperture_base_hi;
  71     uint32_t private_segment_aperture_base_hi;
  72     uint32_t max_cu_id;
  73     uint32_t max_wave_id;
  74     volatile uint64_t max_legacy_doorbell_dispatch_id_plus_1;
  75     volatile uint32_t legacy_doorbell_lock;
  76     uint32_t reserved2[9];
  77     volatile uint64_t read_dispatch_id;
  78     uint32_t read_dispatch_id_field_base_byte_offset;
  79     uint32_t compute_tmpring_size_waves : 12;
  80     uint32_t compute_tmpring_size_wavesize : 13;
  81     uint32_t compute_tmpring_size_pad : 7;
  82     uint32_t scratch_resource_descriptor[4];
  83     uint64_t scratch_backing_memory_location;
  84     uint64_t scratch_backing_memory_byte_size;
  85     uint32_t scratch_workitem_byte_size;
  86     _amd_queue_properties32_t queue_properties;
  87     uint32_t reserved3[2];
  88     _hsa_signal_t queue_inactive_signal;
  89     uint32_t reserved4[14];
  90 } _amd_queue_t;
  91
  92 #endif // __DEV_HSA_HSA_QUEUE_HH__