2 * Copyright (c) 2012 ARM Limited
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42 * Implementiation of an i2c bus
45 #ifndef __DEV_I2C_BUS_HH__
46 #define __DEV_I2C_BUS_HH__
50 #include "dev/io_device.hh"
51 #include "params/I2CBus.hh"
55 class I2CBus : public BasicPioDevice
67 * Read [and Set] serial control bits:
71 * http://infocenter.arm.com/help/topic/com.arm.doc.dui0440b/Bbajdjeg.html
73 static const int SB_CONTROLS = 0x0;
74 /** Clear control bits. Analogous to SB_CONTROLS */
75 static const int SB_CONTROLC = 0x4;
77 /** I2C clock wire (0, 1). */
79 /** I2C data wire (0, 1) */
83 * State used by I2CBus::write to determine what stage of an i2c
84 * transmission it is currently in.
89 * Order of the bit of the current message that is being sent or
95 * Key used to access a device in the slave devices map. This
96 * is the same address that is specified in kernel board
97 * initialization code (e.g., arch/arm/mach-realview/core.c).
101 /** 8-bit buffer used to send and receive messages bit by bit. */
105 * All the slave i2c devices that are connected to this
106 * bus. Each device has an address that points to the actual
109 std::map<uint8_t, I2CDevice*> devices;
112 * Update data (sda) and clock (scl) to match any transitions
115 * @param pkt memory request packet
117 void updateSignals(PacketPtr pkt);
122 * @param pkt memory request packet
123 * @return true if pkt indicates that scl transition from 0 to 1
125 bool isClockSet(PacketPtr pkt) const;
128 * i2c start signal check
130 * @param pkt memory request packet
131 * @return true if pkt indicates a new transmission
133 bool isStart(PacketPtr pkt) const;
136 * i2c end signal check
138 * @param pkt memory request packet
139 * @return true if pkt indicates stopping the current transmission
141 bool isEnd(PacketPtr pkt) const;
145 I2CBus(const I2CBusParams* p);
147 Tick read(PacketPtr pkt) override;
148 Tick write(PacketPtr pkt) override;
150 void serialize(CheckpointOut &cp) const override;
151 void unserialize(CheckpointIn &cp) override;
154 #endif // __DEV_I2C_BUS_HH__