src/dev/i2cbus.hh

   1 /*
   2  * Copyright (c) 2012 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
  16  * met: redistributions of source code must retain the above copyright
  17  * notice, this list of conditions and the following disclaimer;
  18  * redistributions in binary form must reproduce the above copyright
  19  * notice, this list of conditions and the following disclaimer in the
  20  * documentation and/or other materials provided with the distribution;
  21  * neither the name of the copyright holders nor the names of its
  22  * contributors may be used to endorse or promote products derived from
  23  * this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  *
  37  * Authors: Peter Enns
  38  */
  39
  40
  41 /** @file
  42  * Implementiation of an i2c bus
  43  */
  44
  45 #ifndef __DEV_I2CBUS__
  46 #define __DEV_I2CBUS__
  47
  48 #include <map>
  49
  50 #include "dev/i2cdev.hh"
  51 #include "dev/io_device.hh"
  52 #include "params/I2CBus.hh"
  53
  54 class I2CBus : public BasicPioDevice
  55 {
  56   protected:
  57
  58     enum I2CState {
  59         IDLE,
  60         RECEIVING_ADDR,
  61         RECEIVING_DATA,
  62         SENDING_DATA,
  63     };
  64
  65     /**
  66      * Read [and Set] serial control bits:
  67      * Bit [0] is SCL
  68      * Bit [1] is SDA
  69      *
  70      * http://infocenter.arm.com/help/topic/com.arm.doc.dui0440b/Bbajdjeg.html
  71      */
  72     static const int SB_CONTROLS = 0x0;
  73     /** Clear control bits. Analogous to SB_CONTROLS */
  74     static const int SB_CONTROLC = 0x4;
  75
  76     /** I2C clock wire (0, 1). */
  77     uint8_t scl;
  78     /** I2C data wire (0, 1) */
  79     uint8_t sda;
  80
  81     /**
  82      * State used by I2CBus::write to determine what stage of an i2c
  83      * transmission it is currently in.
  84      */
  85     enum I2CState state;
  86
  87     /**
  88      * Order of the bit of the current message that is being sent or
  89      * received (0 - 7).
  90      */
  91     int currBit;
  92
  93     /**
  94      * Key used to access a device in the slave devices map. This
  95      * is the same address that is specified in kernel board
  96      * initialization code (e.g., arch/arm/mach-realview/core.c).
  97      */
  98     uint8_t i2cAddr;
  99
 100     /** 8-bit buffer used to send and receive messages bit by bit. */
 101     uint8_t message;
 102
 103     /**
 104      * All the slave i2c devices that are connected to this
 105      * bus. Each device has an address that points to the actual
 106      * device.
 107      */
 108     std::map<uint8_t, I2CDevice*> devices;
 109
 110     /**
 111      * Update data (sda) and clock (scl) to match any transitions
 112      * specified by pkt.
 113      *
 114      * @param pkt memory request packet
 115      */
 116     void updateSignals(PacketPtr pkt);
 117
 118     /**
 119      * Clock set check
 120      *
 121      * @param pkt memory request packet
 122      * @return true if pkt indicates that scl transition from 0 to 1
 123      */
 124     bool isClockSet(PacketPtr pkt) const;
 125
 126     /**
 127      * i2c start signal check
 128      *
 129      * @param pkt memory request packet
 130      * @return true if pkt indicates a new transmission
 131      */
 132     bool isStart(PacketPtr pkt) const;
 133
 134     /**
 135      * i2c end signal check
 136      *
 137      * @param pkt memory request packet
 138      * @return true if pkt indicates stopping the current transmission
 139      */
 140     bool isEnd(PacketPtr pkt) const;
 141
 142   public:
 143
 144     I2CBus(const I2CBusParams* p);
 145
 146     virtual Tick read(PacketPtr pkt);
 147     virtual Tick write(PacketPtr pkt);
 148
 149     virtual void serialize(std::ostream& os);
 150     virtual void unserialize(Checkpoint* cp, const std::string& section);
 151 };
 152
 153 #endif //__DEV_I2CBUS