src/dev/io_device.cc

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #include "dev/io_device.hh"
  30 #include "sim/builder.hh"
  31
  32
  33 PioPort::PioPort(PioDevice *dev, Platform *p)
  34         : device(dev), platform(p)
  35 { }
  36
  37
  38 Tick
  39 PioPort::recvAtomic(Packet *pkt)
  40 {
  41     return device->recvAtomic(pkt);
  42 }
  43
  44 void
  45 PioPort::recvFunctional(Packet *pkt)
  46 {
  47     device->recvAtomic(pkt);
  48 }
  49
  50 void
  51 PioPort::getDeviceAddressRanges(AddrRangeList &resp, AddrRangeList &snoop)
  52 {
  53     snoop.clear();
  54     device->addressRanges(resp);
  55 }
  56
  57
  58 Packet *
  59 PioPort::recvRetry()
  60 {
  61     Packet* pkt = transmitList.front();
  62     transmitList.pop_front();
  63     return pkt;
  64 }
  65
  66
  67 void
  68 PioPort::SendEvent::process()
  69 {
  70     if (port->Port::sendTiming(packet) == Success)
  71         return;
  72
  73     port->transmitList.push_back(packet);
  74 }
  75
  76
  77 bool
  78 PioPort::recvTiming(Packet *pkt)
  79 {
  80     device->recvAtomic(pkt);
  81     sendTiming(pkt, pkt->time - pkt->req->getTime());
  82     return Success;
  83 }
  84
  85 PioDevice::~PioDevice()
  86 {
  87     if (pioPort)
  88         delete pioPort;
  89 }
  90
  91 void
  92 PioDevice::init()
  93 {
  94     if (!pioPort)
  95         panic("Pio port not connected to anything!");
  96     pioPort->sendStatusChange(Port::RangeChange);
  97 }
  98
  99 void
 100 BasicPioDevice::addressRanges(AddrRangeList &range_list)
 101 {
 102     assert(pioSize != 0);
 103     range_list.clear();
 104     range_list.push_back(RangeSize(pioAddr, pioSize));
 105 }
 106
 107
 108 DmaPort::DmaPort(DmaDevice *dev, Platform *p)
 109         : device(dev), platform(p), pendingCount(0)
 110 { }
 111
 112 bool
 113 DmaPort::recvTiming(Packet *pkt)
 114 {
 115     if (pkt->senderState) {
 116         DmaReqState *state;
 117         state = (DmaReqState*)pkt->senderState;
 118         state->completionEvent->schedule(pkt->time - pkt->req->getTime());
 119         delete pkt->req;
 120         delete pkt;
 121     }  else {
 122         delete pkt->req;
 123         delete pkt;
 124     }
 125
 126     return Success;
 127 }
 128
 129 DmaDevice::DmaDevice(Params *p)
 130     : PioDevice(p), dmaPort(NULL)
 131 { }
 132
 133 void
 134 DmaPort::SendEvent::process()
 135 {
 136     if (port->Port::sendTiming(packet) == Success)
 137         return;
 138
 139     port->transmitList.push_back(packet);
 140 }
 141
 142 Packet *
 143 DmaPort::recvRetry()
 144 {
 145     Packet* pkt = transmitList.front();
 146     transmitList.pop_front();
 147     return pkt;
 148 }
 149 void
 150 DmaPort::dmaAction(Command cmd, Addr addr, int size, Event *event,
 151         uint8_t *data)
 152 {
 153
 154     assert(event);
 155
 156     int prevSize = 0;
 157     Packet basePkt;
 158     Request baseReq(false);
 159
 160     basePkt.flags = 0;
 161     basePkt.coherence = NULL;
 162     basePkt.senderState = NULL;
 163     basePkt.dest = Packet::Broadcast;
 164     basePkt.cmd = cmd;
 165     basePkt.result = Unknown;
 166     basePkt.req = NULL;
 167 //    baseReq.nicReq = true;
 168     baseReq.setTime(curTick);
 169
 170     for (ChunkGenerator gen(addr, size, peerBlockSize());
 171          !gen.done(); gen.next()) {
 172             Packet *pkt = new Packet(basePkt);
 173             Request *req = new Request(baseReq);
 174             pkt->addr = gen.addr();
 175             pkt->size = gen.size();
 176             pkt->req = req;
 177             pkt->req->setPaddr(pkt->addr);
 178             pkt->req->setSize(pkt->size);
 179             // Increment the data pointer on a write
 180             if (data)
 181                 pkt->dataStatic(data + prevSize) ;
 182             prevSize += pkt->size;
 183             // Set the last bit of the dma as the final packet for this dma
 184             // and set it's completion event.
 185             if (prevSize == size) {
 186                 DmaReqState *state = new DmaReqState(event, true);
 187
 188                 pkt->senderState = (void*)state;
 189             }
 190             assert(pendingCount >= 0);
 191             pendingCount++;
 192             sendDma(pkt);
 193     }
 194     // since this isn't getting used and we want a check to make sure that all
 195     // packets had data in them at some point.
 196     basePkt.dataStatic((uint8_t*)NULL);
 197 }
 198
 199
 200 void
 201 DmaPort::sendDma(Packet *pkt)
 202 {
 203    // some kind of selction between access methods
 204    // more work is going to have to be done to make
 205    // switching actually work
 206   /* MemState state = device->platform->system->memState;
 207
 208    if (state == Timing) {
 209        if (sendTiming(pkt) == Failure)
 210            transmitList.push_back(&packet);
 211     } else if (state == Atomic) {*/
 212        sendAtomic(pkt);
 213        if (pkt->senderState) {
 214            DmaReqState *state = (DmaReqState*)pkt->senderState;
 215            state->completionEvent->schedule(curTick + (pkt->time - pkt->req->getTime()) +1);
 216        }
 217        pendingCount--;
 218        assert(pendingCount >= 0);
 219        delete pkt->req;
 220        delete pkt;
 221
 222 /*   } else if (state == Functional) {
 223        sendFunctional(pkt);
 224        // Is this correct???
 225        completionEvent->schedule(pkt->req->responseTime - pkt->req->requestTime);
 226        completionEvent == NULL;
 227    } else
 228        panic("Unknown memory command state.");
 229   */
 230 }
 231
 232 DmaDevice::~DmaDevice()
 233 {
 234     if (dmaPort)
 235         delete dmaPort;
 236 }
 237
 238