2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
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14 * this software without specific prior written permission.
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17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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32 * Isa Fake Device implementation
35 #include "base/trace.hh"
36 #include "debug/IsaFake.hh"
37 #include "dev/isa_fake.hh"
38 #include "mem/packet.hh"
39 #include "mem/packet_access.hh"
40 #include "sim/system.hh"
44 IsaFake::IsaFake(Params
*p
)
45 : BasicPioDevice(p
, p
->ret_bad_addr
? 0 : p
->pio_size
)
47 retData8
= p
->ret_data8
;
48 retData16
= p
->ret_data16
;
49 retData32
= p
->ret_data32
;
50 retData64
= p
->ret_data64
;
54 IsaFake::read(PacketPtr pkt
)
56 pkt
->makeAtomicResponse();
58 if (params()->warn_access
!= "")
59 warn("Device %s accessed by read to address %#x size=%d\n",
60 name(), pkt
->getAddr(), pkt
->getSize());
61 if (params()->ret_bad_addr
) {
62 DPRINTF(IsaFake
, "read to bad address va=%#x size=%d\n",
63 pkt
->getAddr(), pkt
->getSize());
66 assert(pkt
->getAddr() >= pioAddr
&& pkt
->getAddr() < pioAddr
+ pioSize
);
67 DPRINTF(IsaFake
, "read va=%#x size=%d\n",
68 pkt
->getAddr(), pkt
->getSize());
69 switch (pkt
->getSize()) {
70 case sizeof(uint64_t):
73 case sizeof(uint32_t):
76 case sizeof(uint16_t):
83 if (params()->fake_mem
)
84 std::memset(pkt
->getPtr
<uint8_t>(), 0, pkt
->getSize());
86 panic("invalid access size! Device being accessed by cache?\n");
93 IsaFake::write(PacketPtr pkt
)
95 pkt
->makeAtomicResponse();
96 if (params()->warn_access
!= "") {
98 switch (pkt
->getSize()) {
99 case sizeof(uint64_t):
100 data
= pkt
->get
<uint64_t>();
102 case sizeof(uint32_t):
103 data
= pkt
->get
<uint32_t>();
105 case sizeof(uint16_t):
106 data
= pkt
->get
<uint16_t>();
108 case sizeof(uint8_t):
109 data
= pkt
->get
<uint8_t>();
112 panic("invalid access size: %u\n", pkt
->getSize());
114 warn("Device %s accessed by write to address %#x size=%d data=%#x\n",
115 name(), pkt
->getAddr(), pkt
->getSize(), data
);
117 if (params()->ret_bad_addr
) {
118 DPRINTF(IsaFake
, "write to bad address va=%#x size=%d \n",
119 pkt
->getAddr(), pkt
->getSize());
120 pkt
->setBadAddress();
122 DPRINTF(IsaFake
, "write - va=%#x size=%d \n",
123 pkt
->getAddr(), pkt
->getSize());
125 if (params()->update_data
) {
126 switch (pkt
->getSize()) {
127 case sizeof(uint64_t):
128 retData64
= pkt
->get
<uint64_t>();
130 case sizeof(uint32_t):
131 retData32
= pkt
->get
<uint32_t>();
133 case sizeof(uint16_t):
134 retData16
= pkt
->get
<uint16_t>();
136 case sizeof(uint8_t):
137 retData8
= pkt
->get
<uint8_t>();
140 panic("invalid access size!\n");
148 IsaFakeParams::create()
150 return new IsaFake(this);