src/dev/isa_fake.cc

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Ali Saidi
  29  */
  30
  31 /** @file
  32  * Isa Fake Device implementation
  33  */
  34
  35 #include "base/trace.hh"
  36 #include "debug/IsaFake.hh"
  37 #include "dev/isa_fake.hh"
  38 #include "mem/packet.hh"
  39 #include "mem/packet_access.hh"
  40 #include "sim/system.hh"
  41
  42 using namespace std;
  43
  44 IsaFake::IsaFake(Params *p)
  45     : BasicPioDevice(p)
  46 {
  47     if (!p->ret_bad_addr)
  48         pioSize = p->pio_size;
  49
  50     retData8 = p->ret_data8;
  51     retData16 = p->ret_data16;
  52     retData32 = p->ret_data32;
  53     retData64 = p->ret_data64;
  54 }
  55
  56 Tick
  57 IsaFake::read(PacketPtr pkt)
  58 {
  59     pkt->allocate();
  60     pkt->makeAtomicResponse();
  61
  62     if (params()->warn_access != "")
  63         warn("Device %s accessed by read to address %#x size=%d\n",
  64                 name(), pkt->getAddr(), pkt->getSize());
  65     if (params()->ret_bad_addr) {
  66         DPRINTF(IsaFake, "read to bad address va=%#x size=%d\n",
  67                 pkt->getAddr(), pkt->getSize());
  68         pkt->setBadAddress();
  69     } else {
  70         assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
  71         DPRINTF(IsaFake, "read  va=%#x size=%d\n",
  72                 pkt->getAddr(), pkt->getSize());
  73         switch (pkt->getSize()) {
  74           case sizeof(uint64_t):
  75              pkt->set(retData64);
  76              break;
  77           case sizeof(uint32_t):
  78              pkt->set(retData32);
  79              break;
  80           case sizeof(uint16_t):
  81              pkt->set(retData16);
  82              break;
  83           case sizeof(uint8_t):
  84              pkt->set(retData8);
  85              break;
  86           default:
  87              if (params()->fake_mem)
  88                  std::memset(pkt->getPtr<uint8_t>(), 0, pkt->getSize());
  89              else
  90                  panic("invalid access size! Device being accessed by cache?\n");
  91         }
  92     }
  93     return pioDelay;
  94 }
  95
  96 Tick
  97 IsaFake::write(PacketPtr pkt)
  98 {
  99     pkt->makeAtomicResponse();
 100     if (params()->warn_access != "") {
 101         uint64_t data;
 102         switch (pkt->getSize()) {
 103           case sizeof(uint64_t):
 104             data = pkt->get<uint64_t>();
 105             break;
 106           case sizeof(uint32_t):
 107             data = pkt->get<uint32_t>();
 108             break;
 109           case sizeof(uint16_t):
 110             data = pkt->get<uint16_t>();
 111             break;
 112           case sizeof(uint8_t):
 113             data = pkt->get<uint8_t>();
 114             break;
 115           default:
 116             panic("invalid access size!\n");
 117         }
 118         warn("Device %s accessed by write to address %#x size=%d data=%#x\n",
 119                 name(), pkt->getAddr(), pkt->getSize(), data);
 120     }
 121     if (params()->ret_bad_addr) {
 122         DPRINTF(IsaFake, "write to bad address va=%#x size=%d \n",
 123                 pkt->getAddr(), pkt->getSize());
 124         pkt->setBadAddress();
 125     } else {
 126         DPRINTF(IsaFake, "write - va=%#x size=%d \n",
 127                 pkt->getAddr(), pkt->getSize());
 128
 129         if (params()->update_data) {
 130             switch (pkt->getSize()) {
 131               case sizeof(uint64_t):
 132                 retData64 = pkt->get<uint64_t>();
 133                 break;
 134               case sizeof(uint32_t):
 135                 retData32 = pkt->get<uint32_t>();
 136                 break;
 137               case sizeof(uint16_t):
 138                 retData16 = pkt->get<uint16_t>();
 139                 break;
 140               case sizeof(uint8_t):
 141                 retData8 = pkt->get<uint8_t>();
 142                 break;
 143               default:
 144                 panic("invalid access size!\n");
 145             }
 146         }
 147     }
 148     return pioDelay;
 149 }
 150
 151 IsaFake *
 152 IsaFakeParams::create()
 153 {
 154     return new IsaFake(this);
 155 }