src/dev/isa_fake.cc

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Ali Saidi
  29  */
  30
  31 /** @file
  32  * Isa Fake Device implementation
  33  */
  34
  35 #include "base/trace.hh"
  36 #include "dev/isa_fake.hh"
  37 #include "mem/packet.hh"
  38 #include "mem/packet_access.hh"
  39 #include "sim/builder.hh"
  40 #include "sim/system.hh"
  41
  42 using namespace std;
  43
  44 IsaFake::IsaFake(Params *p)
  45     : BasicPioDevice(p)
  46 {
  47     if (!params()->retBadAddr)
  48         pioSize = p->pio_size;
  49
  50     retData8 = params()->retData8;
  51     retData16 = params()->retData16;
  52     retData32 = params()->retData32;
  53     retData64 = params()->retData64;
  54 }
  55
  56 Tick
  57 IsaFake::read(PacketPtr pkt)
  58 {
  59
  60     if (params()->warnAccess != "")
  61         warn("Device %s accessed by read to address %#x size=%d\n",
  62                 name(), pkt->getAddr(), pkt->getSize());
  63     if (params()->retBadAddr) {
  64         DPRINTF(Tsunami, "read to bad address va=%#x size=%d\n",
  65                 pkt->getAddr(), pkt->getSize());
  66         pkt->setBadAddress();
  67     } else {
  68         assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
  69         DPRINTF(Tsunami, "read  va=%#x size=%d\n",
  70                 pkt->getAddr(), pkt->getSize());
  71         switch (pkt->getSize()) {
  72           case sizeof(uint64_t):
  73              pkt->set(retData64);
  74              break;
  75           case sizeof(uint32_t):
  76              pkt->set(retData32);
  77              break;
  78           case sizeof(uint16_t):
  79              pkt->set(retData16);
  80              break;
  81           case sizeof(uint8_t):
  82              pkt->set(retData8);
  83              break;
  84           default:
  85             panic("invalid access size!\n");
  86         }
  87         pkt->makeAtomicResponse();
  88     }
  89     return pioDelay;
  90 }
  91
  92 Tick
  93 IsaFake::write(PacketPtr pkt)
  94 {
  95     if (params()->warnAccess != "") {
  96         uint64_t data;
  97         switch (pkt->getSize()) {
  98           case sizeof(uint64_t):
  99             data = pkt->get<uint64_t>();
 100             break;
 101           case sizeof(uint32_t):
 102             data = pkt->get<uint32_t>();
 103             break;
 104           case sizeof(uint16_t):
 105             data = pkt->get<uint16_t>();
 106             break;
 107           case sizeof(uint8_t):
 108             data = pkt->get<uint8_t>();
 109             break;
 110           default:
 111             panic("invalid access size!\n");
 112         }
 113         warn("Device %s accessed by write to address %#x size=%d data=%#x\n",
 114                 name(), pkt->getAddr(), pkt->getSize(), data);
 115     }
 116     if (params()->retBadAddr) {
 117         DPRINTF(Tsunami, "write to bad address va=%#x size=%d \n",
 118                 pkt->getAddr(), pkt->getSize());
 119         pkt->setBadAddress();
 120     } else {
 121         DPRINTF(Tsunami, "write - va=%#x size=%d \n",
 122                 pkt->getAddr(), pkt->getSize());
 123
 124         if (params()->updateData) {
 125             switch (pkt->getSize()) {
 126               case sizeof(uint64_t):
 127                 retData64 = pkt->get<uint64_t>();
 128                 break;
 129               case sizeof(uint32_t):
 130                 retData32 = pkt->get<uint32_t>();
 131                 break;
 132               case sizeof(uint16_t):
 133                 retData16 = pkt->get<uint16_t>();
 134                 break;
 135               case sizeof(uint8_t):
 136                 retData8 = pkt->get<uint8_t>();
 137                 break;
 138               default:
 139                 panic("invalid access size!\n");
 140             }
 141         }
 142         pkt->makeAtomicResponse();
 143     }
 144     return pioDelay;
 145 }
 146
 147 BEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake)
 148
 149     Param<Addr> pio_addr;
 150     Param<Tick> pio_latency;
 151     Param<Addr> pio_size;
 152     Param<bool> ret_bad_addr;
 153     Param<bool> update_data;
 154     Param<std::string> warn_access;
 155     Param<uint8_t> ret_data8;
 156     Param<uint16_t> ret_data16;
 157     Param<uint32_t> ret_data32;
 158     Param<uint64_t> ret_data64;
 159     SimObjectParam<Platform *> platform;
 160     SimObjectParam<System *> system;
 161
 162 END_DECLARE_SIM_OBJECT_PARAMS(IsaFake)
 163
 164 BEGIN_INIT_SIM_OBJECT_PARAMS(IsaFake)
 165
 166     INIT_PARAM(pio_addr, "Device Address"),
 167     INIT_PARAM(pio_latency, "Programmed IO latency"),
 168     INIT_PARAM(pio_size, "Size of address range"),
 169     INIT_PARAM(ret_bad_addr, "Return pkt status BadAddr"),
 170     INIT_PARAM(update_data, "Update returned data"),
 171     INIT_PARAM(warn_access, "Warn if this device is touched"),
 172     INIT_PARAM(ret_data8, "Data to return if not bad addr"),
 173     INIT_PARAM(ret_data16, "Data to return if not bad addr"),
 174     INIT_PARAM(ret_data32, "Data to return if not bad addr"),
 175     INIT_PARAM(ret_data64, "Data to return if not bad addr"),
 176     INIT_PARAM(platform, "platform"),
 177     INIT_PARAM(system, "system object")
 178
 179 END_INIT_SIM_OBJECT_PARAMS(IsaFake)
 180
 181 CREATE_SIM_OBJECT(IsaFake)
 182 {
 183     IsaFake::Params *p = new IsaFake::Params;
 184     p->name = getInstanceName();
 185     p->pio_addr = pio_addr;
 186     p->pio_delay = pio_latency;
 187     p->pio_size = pio_size;
 188     p->retBadAddr = ret_bad_addr;
 189     p->updateData = update_data;
 190     p->warnAccess = warn_access;
 191     p->retData8= ret_data8;
 192     p->retData16 = ret_data16;
 193     p->retData32 = ret_data32;
 194     p->retData64 = ret_data64;
 195     p->platform = platform;
 196     p->system = system;
 197     return new IsaFake(p);
 198 }
 199
 200 REGISTER_SIM_OBJECT("IsaFake", IsaFake)