Merge zizzer.eecs.umich.edu:/bk/newmem/
[gem5.git] / src / dev / isa_fake.cc
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31 /** @file
32 * Isa Fake Device implementation
33 */
34
35 #include "base/trace.hh"
36 #include "dev/isa_fake.hh"
37 #include "mem/packet.hh"
38 #include "mem/packet_access.hh"
39 #include "sim/builder.hh"
40 #include "sim/system.hh"
41
42 using namespace std;
43
44 IsaFake::IsaFake(Params *p)
45 : BasicPioDevice(p)
46 {
47 if (!params()->retBadAddr)
48 pioSize = p->pio_size;
49
50 memset(&retData, p->retData, sizeof(retData));
51 }
52
53 Tick
54 IsaFake::read(PacketPtr pkt)
55 {
56 assert(pkt->result == Packet::Unknown);
57
58 if (params()->retBadAddr) {
59 DPRINTF(Tsunami, "read to bad address va=%#x size=%d\n",
60 pkt->getAddr(), pkt->getSize());
61 pkt->result = Packet::BadAddress;
62 } else {
63 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
64 DPRINTF(Tsunami, "read va=%#x size=%d\n",
65 pkt->getAddr(), pkt->getSize());
66 switch (pkt->getSize()) {
67 case sizeof(uint64_t):
68 pkt->set(retData);
69 break;
70 case sizeof(uint32_t):
71 pkt->set((uint32_t)retData);
72 break;
73 case sizeof(uint16_t):
74 pkt->set((uint16_t)retData);
75 break;
76 case sizeof(uint8_t):
77 pkt->set((uint8_t)retData);
78 break;
79 default:
80 panic("invalid access size!\n");
81 }
82 pkt->result = Packet::Success;
83 }
84 return pioDelay;
85 }
86
87 Tick
88 IsaFake::write(PacketPtr pkt)
89 {
90 if (params()->retBadAddr) {
91 DPRINTF(Tsunami, "write to bad address va=%#x size=%d \n",
92 pkt->getAddr(), pkt->getSize());
93 pkt->result = Packet::BadAddress;
94 } else {
95 DPRINTF(Tsunami, "write - va=%#x size=%d \n",
96 pkt->getAddr(), pkt->getSize());
97 pkt->result = Packet::Success;
98 }
99 return pioDelay;
100 }
101
102 BEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake)
103
104 Param<Addr> pio_addr;
105 Param<Tick> pio_latency;
106 Param<Addr> pio_size;
107 Param<bool> ret_bad_addr;
108 Param<uint8_t> ret_data;
109 SimObjectParam<Platform *> platform;
110 SimObjectParam<System *> system;
111
112 END_DECLARE_SIM_OBJECT_PARAMS(IsaFake)
113
114 BEGIN_INIT_SIM_OBJECT_PARAMS(IsaFake)
115
116 INIT_PARAM(pio_addr, "Device Address"),
117 INIT_PARAM(pio_latency, "Programmed IO latency"),
118 INIT_PARAM(pio_size, "Size of address range"),
119 INIT_PARAM(ret_bad_addr, "Return pkt status BadAddr"),
120 INIT_PARAM(ret_data, "Data to return if not bad addr"),
121 INIT_PARAM(platform, "platform"),
122 INIT_PARAM(system, "system object")
123
124 END_INIT_SIM_OBJECT_PARAMS(IsaFake)
125
126 CREATE_SIM_OBJECT(IsaFake)
127 {
128 IsaFake::Params *p = new IsaFake::Params;
129 p->name = getInstanceName();
130 p->pio_addr = pio_addr;
131 p->pio_delay = pio_latency;
132 p->pio_size = pio_size;
133 p->retBadAddr = ret_bad_addr;
134 p->retData = ret_data;
135 p->platform = platform;
136 p->system = system;
137 return new IsaFake(p);
138 }
139
140 REGISTER_SIM_OBJECT("IsaFake", IsaFake)