2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
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10 * notice, this list of conditions and the following disclaimer in the
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12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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33 #include "dev/mc146818.hh"
40 #include "base/bitfield.hh"
41 #include "base/time.hh"
42 #include "base/trace.hh"
43 #include "debug/MC146818.hh"
44 #include "dev/rtcreg.h"
53 result
+= (val
/ 10) << 4;
62 result
+= (val
>> 4) * 10;
67 MC146818::setTime(const struct tm time
)
71 // Unix is 0-11 for month, data seet says start at 1
72 mon
= time
.tm_mon
+ 1;
78 // Datasheet says 1 is sunday
79 wday
= time
.tm_wday
+ 1;
82 // The datasheet says that the year field can be either BCD or
83 // years since 1900. Linux seems to be happy with years since
85 year
= bcdize(year
% 100);
94 MC146818::MC146818(EventManager
*em
, const string
&n
, const struct tm time
,
95 bool bcd
, Tick frequency
)
96 : EventManager(em
), _name(n
), event(this, frequency
), tickEvent(this)
98 memset(clock_data
, 0, sizeof(clock_data
));
101 stat_regA
.dv
= RTCA_DV_32768HZ
;
102 stat_regA
.rs
= RTCA_RS_1024HZ
;
106 stat_regB
.format24h
= 1;
107 stat_regB
.dm
= bcd
? 0 : 1;
110 DPRINTFN("Real-time clock set to %s", asctime(&time
));
113 MC146818::~MC146818()
115 deschedule(tickEvent
);
120 MC146818::rega_dv_disabled(const RtcRegA
®
)
122 return reg
.dv
== RTCA_DV_DISABLED0
||
123 reg
.dv
== RTCA_DV_DISABLED1
;
129 assert(!event
.scheduled());
130 assert(!tickEvent
.scheduled());
133 schedule(event
, curTick() + event
.offset
);
134 if (!rega_dv_disabled(stat_regA
))
135 schedule(tickEvent
, curTick() + tickEvent
.offset
);
139 MC146818::writeData(const uint8_t addr
, const uint8_t data
)
141 bool panic_unsupported(false);
143 if (addr
< RTC_STAT_REGA
) {
144 clock_data
[addr
] = data
;
145 curTime
.tm_sec
= unbcdize(sec
);
146 curTime
.tm_min
= unbcdize(min
);
147 curTime
.tm_hour
= unbcdize(hour
);
148 curTime
.tm_mday
= unbcdize(mday
);
149 curTime
.tm_mon
= unbcdize(mon
) - 1;
150 curTime
.tm_year
= ((unbcdize(year
) + 50) % 100) + 1950;
151 curTime
.tm_wday
= unbcdize(wday
) - 1;
154 case RTC_STAT_REGA
: {
155 RtcRegA
old_rega(stat_regA
);
157 // The "update in progress" bit is read only.
158 stat_regA
.uip
= old_rega
;
160 if (!rega_dv_disabled(stat_regA
) &&
161 stat_regA
.dv
!= RTCA_DV_32768HZ
) {
162 inform("RTC: Unimplemented divider configuration: %i\n",
164 panic_unsupported
= true;
167 if (stat_regA
.rs
!= RTCA_RS_1024HZ
) {
168 inform("RTC: Unimplemented interrupt rate: %i\n",
170 panic_unsupported
= true;
173 if (rega_dv_disabled(stat_regA
)) {
174 // The divider is disabled, make sure that we don't
175 // schedule any ticks.
176 if (tickEvent
.scheduled())
177 deschedule(tickEvent
);
178 } else if (rega_dv_disabled(old_rega
)) {
179 // According to the specification, the next tick
180 // happens after 0.5s when the divider chain goes
181 // from reset to active. So, we simply schedule the
183 assert(!tickEvent
.scheduled());
184 schedule(tickEvent
, curTick() + SimClock::Int::s
/ 2);
189 if (stat_regB
.aie
|| stat_regB
.uie
) {
190 inform("RTC: Unimplemented interrupt configuration: %s %s\n",
191 stat_regB
.aie
? "alarm" : "",
192 stat_regB
.uie
? "update" : "");
193 panic_unsupported
= true;
197 inform("RTC: The binary interface is not fully implemented.\n");
198 panic_unsupported
= true;
201 if (!stat_regB
.format24h
) {
202 inform("RTC: The 12h time format not supported.\n");
203 panic_unsupported
= true;
207 inform("RTC: Automatic daylight saving time not supported.\n");
208 panic_unsupported
= true;
212 if (!event
.scheduled())
213 event
.scheduleIntr();
215 if (event
.scheduled())
221 panic("RTC status registers C and D are not implemented.\n");
226 if (panic_unsupported
)
227 panic("Unimplemented RTC configuration!\n");
232 MC146818::readData(uint8_t addr
)
234 if (addr
< RTC_STAT_REGA
)
235 return clock_data
[addr
];
239 // toggle UIP bit for linux
240 stat_regA
.uip
= !stat_regA
.uip
;
251 panic("Shouldn't be here");
257 MC146818::tickClock()
259 assert(!rega_dv_disabled(stat_regA
));
263 time_t calTime
= mkutctime(&curTime
);
265 setTime(*gmtime(&calTime
));
269 MC146818::serialize(const string
&base
, CheckpointOut
&cp
) const
271 uint8_t regA_serial(stat_regA
);
272 uint8_t regB_serial(stat_regB
);
274 arrayParamOut(cp
, base
+ ".clock_data", clock_data
, sizeof(clock_data
));
275 paramOut(cp
, base
+ ".stat_regA", (uint8_t)regA_serial
);
276 paramOut(cp
, base
+ ".stat_regB", (uint8_t)regB_serial
);
279 // save the timer tick and rtc clock tick values to correctly reschedule
280 // them during unserialize
282 Tick rtcTimerInterruptTickOffset
= event
.when() - curTick();
283 SERIALIZE_SCALAR(rtcTimerInterruptTickOffset
);
284 Tick rtcClockTickOffset
= tickEvent
.when() - curTick();
285 SERIALIZE_SCALAR(rtcClockTickOffset
);
289 MC146818::unserialize(const string
&base
, CheckpointIn
&cp
)
293 arrayParamIn(cp
, base
+ ".clock_data", clock_data
,
296 paramIn(cp
, base
+ ".stat_regA", tmp8
);
298 paramIn(cp
, base
+ ".stat_regB", tmp8
);
302 // properly schedule the timer and rtc clock events
304 Tick rtcTimerInterruptTickOffset
;
305 UNSERIALIZE_SCALAR(rtcTimerInterruptTickOffset
);
306 event
.offset
= rtcTimerInterruptTickOffset
;
307 Tick rtcClockTickOffset
;
308 UNSERIALIZE_SCALAR(rtcClockTickOffset
);
309 tickEvent
.offset
= rtcClockTickOffset
;
312 MC146818::RTCEvent::RTCEvent(MC146818
* _parent
, Tick i
)
313 : parent(_parent
), interval(i
), offset(i
)
315 DPRINTF(MC146818
, "RTC Event Initilizing\n");
319 MC146818::RTCEvent::scheduleIntr()
321 parent
->schedule(this, curTick() + interval
);
325 MC146818::RTCEvent::process()
327 DPRINTF(MC146818
, "RTC Timer Interrupt\n");
328 parent
->schedule(this, curTick() + interval
);
329 parent
->handleEvent();
333 MC146818::RTCEvent::description() const
335 return "RTC interrupt";
339 MC146818::RTCTickEvent::process()
341 DPRINTF(MC146818
, "RTC clock tick\n");
342 parent
->schedule(this, curTick() + SimClock::Int::s
);
347 MC146818::RTCTickEvent::description() const
349 return "RTC clock tick";