dev-arm: Set frequency ranges in OSC device tree nodes.
[gem5.git] / src / dev / mc146818.hh
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __DEV_MC146818_HH__
30 #define __DEV_MC146818_HH__
31
32 #include "base/bitunion.hh"
33 #include "base/logging.hh"
34 #include "sim/core.hh"
35 #include "sim/eventq.hh"
36
37 /** Real-Time Clock (MC146818) */
38 class MC146818 : public EventManager
39 {
40 protected:
41 virtual void handleEvent()
42 {
43 warn("No RTC event handler defined.\n");
44 }
45
46 private:
47 /** Event for RTC periodic interrupt */
48 struct RTCEvent : public Event
49 {
50 MC146818 * parent;
51 Tick interval;
52 Tick offset;
53
54 RTCEvent(MC146818 * _parent, Tick i);
55
56 /** Schedule the RTC periodic interrupt */
57 void scheduleIntr();
58
59 /** Event process to occur at interrupt*/
60 virtual void process();
61
62 /** Event description */
63 virtual const char *description() const;
64 };
65
66 /** Event for RTC periodic interrupt */
67 struct RTCTickEvent : public Event
68 {
69 MC146818 * parent;
70 Tick offset;
71
72 RTCTickEvent(MC146818 * _parent) :
73 parent(_parent), offset(SimClock::Int::s)
74 {}
75
76 /** Event process to occur at interrupt*/
77 void process();
78
79 /** Event description */
80 const char *description() const;
81 };
82
83 private:
84 std::string _name;
85 const std::string &name() const { return _name; }
86
87 /** RTC periodic interrupt event */
88 RTCEvent event;
89
90 /** RTC tick event */
91 RTCTickEvent tickEvent;
92
93 /** Data for real-time clock function */
94 union {
95 uint8_t clock_data[10];
96
97 struct {
98 uint8_t sec;
99 uint8_t sec_alrm;
100 uint8_t min;
101 uint8_t min_alrm;
102 uint8_t hour;
103 uint8_t hour_alrm;
104 uint8_t wday;
105 uint8_t mday;
106 uint8_t mon;
107 uint8_t year;
108 };
109 };
110
111 struct tm curTime;
112
113 void setTime(const struct tm time);
114
115 BitUnion8(RtcRegA)
116 Bitfield<7> uip; /// 1 = date and time update in progress
117 Bitfield<6, 4> dv; /// Divider configuration
118 /** Rate selection
119 0 = Disabled
120 For 32768 Hz time bases:
121 Freq = 32768Hz / 2**(n-1) for n >= 3
122 Freq = 256Hz if n = 1
123 Freq = 128Hz if n = 2
124 Othwerise:
125 Freq = 32768Hz / 2**(n-1)
126 */
127 Bitfield<3, 0> rs;
128 EndBitUnion(RtcRegA)
129
130 /// Is the DV field in regA set to disabled?
131 static inline bool rega_dv_disabled(const RtcRegA &reg);
132
133 BitUnion8(RtcRegB)
134 Bitfield<7> set; /// stop clock updates
135 Bitfield<6> pie; /// 1 = enable periodic clock interrupt
136 Bitfield<5> aie; /// 1 = enable alarm interrupt
137 Bitfield<4> uie; /// 1 = enable update-ended interrupt
138 Bitfield<3> sqwe; /// 1 = output sqare wave at SQW pin
139 Bitfield<2> dm; /// 0 = BCD, 1 = Binary coded time
140 Bitfield<1> format24h; /// 0 = 12 hours, 1 = 24 hours
141 Bitfield<0> dse; /// USA Daylight Savings Time enable
142 EndBitUnion(RtcRegB)
143
144 /** RTC status register A */
145 RtcRegA stat_regA;
146
147 /** RTC status register B */
148 RtcRegB stat_regB;
149
150 public:
151 MC146818(EventManager *em, const std::string &name, const struct tm time,
152 bool bcd, Tick frequency);
153 virtual ~MC146818();
154
155 /** Start ticking */
156 virtual void startup();
157
158 /** RTC write data */
159 void writeData(const uint8_t addr, const uint8_t data);
160
161 /** RTC read data */
162 uint8_t readData(const uint8_t addr);
163
164 void tickClock();
165
166 /**
167 * Serialize this object to the given output stream.
168 * @param base The base name of the counter object.
169 * @param os The stream to serialize to.
170 */
171 void serialize(const std::string &base, CheckpointOut &cp) const;
172
173 /**
174 * Reconstruct the state of this object from a checkpoint.
175 * @param base The base name of the counter object.
176 * @param cp The checkpoint use.
177 * @param section The section name of this object
178 */
179 void unserialize(const std::string &base, CheckpointIn &cp);
180 };
181
182 #endif // __DEV_MC146818_HH__