misc: merge branch 'release-staging-v19.0.0.0' into develop
[gem5.git] / src / dev / mc146818.hh
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __DEV_MC146818_HH__
30 #define __DEV_MC146818_HH__
31
32 #include "base/bitunion.hh"
33 #include "base/logging.hh"
34 #include "sim/eventq_impl.hh"
35
36 /** Real-Time Clock (MC146818) */
37 class MC146818 : public EventManager
38 {
39 protected:
40 virtual void handleEvent()
41 {
42 warn("No RTC event handler defined.\n");
43 }
44
45 private:
46 /** Event for RTC periodic interrupt */
47 struct RTCEvent : public Event
48 {
49 MC146818 * parent;
50 Tick interval;
51 Tick offset;
52
53 RTCEvent(MC146818 * _parent, Tick i);
54
55 /** Schedule the RTC periodic interrupt */
56 void scheduleIntr();
57
58 /** Event process to occur at interrupt*/
59 virtual void process();
60
61 /** Event description */
62 virtual const char *description() const;
63 };
64
65 /** Event for RTC periodic interrupt */
66 struct RTCTickEvent : public Event
67 {
68 MC146818 * parent;
69 Tick offset;
70
71 RTCTickEvent(MC146818 * _parent) :
72 parent(_parent), offset(SimClock::Int::s)
73 {}
74
75 /** Event process to occur at interrupt*/
76 void process();
77
78 /** Event description */
79 const char *description() const;
80 };
81
82 private:
83 std::string _name;
84 const std::string &name() const { return _name; }
85
86 /** RTC periodic interrupt event */
87 RTCEvent event;
88
89 /** RTC tick event */
90 RTCTickEvent tickEvent;
91
92 /** Data for real-time clock function */
93 union {
94 uint8_t clock_data[10];
95
96 struct {
97 uint8_t sec;
98 uint8_t sec_alrm;
99 uint8_t min;
100 uint8_t min_alrm;
101 uint8_t hour;
102 uint8_t hour_alrm;
103 uint8_t wday;
104 uint8_t mday;
105 uint8_t mon;
106 uint8_t year;
107 };
108 };
109
110 struct tm curTime;
111
112 void setTime(const struct tm time);
113
114 BitUnion8(RtcRegA)
115 Bitfield<7> uip; /// 1 = date and time update in progress
116 Bitfield<6, 4> dv; /// Divider configuration
117 /** Rate selection
118 0 = Disabled
119 For 32768 Hz time bases:
120 Freq = 32768Hz / 2**(n-1) for n >= 3
121 Freq = 256Hz if n = 1
122 Freq = 128Hz if n = 2
123 Othwerise:
124 Freq = 32768Hz / 2**(n-1)
125 */
126 Bitfield<3, 0> rs;
127 EndBitUnion(RtcRegA)
128
129 /// Is the DV field in regA set to disabled?
130 static inline bool rega_dv_disabled(const RtcRegA &reg);
131
132 BitUnion8(RtcRegB)
133 Bitfield<7> set; /// stop clock updates
134 Bitfield<6> pie; /// 1 = enable periodic clock interrupt
135 Bitfield<5> aie; /// 1 = enable alarm interrupt
136 Bitfield<4> uie; /// 1 = enable update-ended interrupt
137 Bitfield<3> sqwe; /// 1 = output sqare wave at SQW pin
138 Bitfield<2> dm; /// 0 = BCD, 1 = Binary coded time
139 Bitfield<1> format24h; /// 0 = 12 hours, 1 = 24 hours
140 Bitfield<0> dse; /// USA Daylight Savings Time enable
141 EndBitUnion(RtcRegB)
142
143 /** RTC status register A */
144 RtcRegA stat_regA;
145
146 /** RTC status register B */
147 RtcRegB stat_regB;
148
149 public:
150 MC146818(EventManager *em, const std::string &name, const struct tm time,
151 bool bcd, Tick frequency);
152 virtual ~MC146818();
153
154 /** Start ticking */
155 virtual void startup();
156
157 /** RTC write data */
158 void writeData(const uint8_t addr, const uint8_t data);
159
160 /** RTC read data */
161 uint8_t readData(const uint8_t addr);
162
163 void tickClock();
164
165 /**
166 * Serialize this object to the given output stream.
167 * @param base The base name of the counter object.
168 * @param os The stream to serialize to.
169 */
170 void serialize(const std::string &base, CheckpointOut &cp) const;
171
172 /**
173 * Reconstruct the state of this object from a checkpoint.
174 * @param base The base name of the counter object.
175 * @param cp The checkpoint use.
176 * @param section The section name of this object
177 */
178 void unserialize(const std::string &base, CheckpointIn &cp);
179 };
180
181 #endif // __DEV_MC146818_HH__