2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 * Declaration of top level class for the Malta chipset. This class just
35 * retains pointers to all its children so the children can communicate.
38 #ifndef __DEV_MALTA_HH__
39 #define __DEV_MALTA_HH__
41 #include "dev/platform.hh"
42 #include "params/Malta.hh"
51 * Top level class for Malta Chipset emulation.
52 * This structure just contains pointers to all the
53 * children so the children can commnicate to do the
57 class Malta : public Platform
60 /** Max number of CPUs in a Malta */
61 static const int Max_CPUs = 64;
63 /** Pointer to the system */
66 /** Pointer to the MaltaIO device which has the RTC */
69 /** Pointer to the Malta CChip.
70 * The chip contains some configuration information and
71 * all the interrupt mask and status registers
75 /** Pointer to the Malta PChip.
76 * The pchip is the interface to the PCI bus, in our case
77 * it does not have to do much.
81 int intr_sum_type[Malta::Max_CPUs];
82 int ipi_pending[Malta::Max_CPUs];
86 * Constructor for the Malta Class.
87 * @param name name of the object
88 * @param s system the object belongs to
89 * @param intctrl pointer to the interrupt controller
91 typedef MaltaParams Params;
92 Malta(const Params *p);
95 * Return the interrupting frequency to MipsAccess
96 * @return frequency of RTC interrupts
98 virtual Tick intrFrequency();
101 * Cause the cpu to post a serial interrupt to the CPU.
103 virtual void postConsoleInt();
106 * Clear a posted CPU interrupt (id=55)
108 virtual void clearConsoleInt();
111 * Cause the chipset to post a cpi interrupt to the CPU.
113 virtual void postPciInt(int line);
116 * Clear a posted PCI->CPU interrupt
118 virtual void clearPciInt(int line);
121 virtual Addr pciToDma(Addr pciAddr) const;
124 calcPciConfigAddr(int bus, int dev, int func)
126 panic("Need implementation\n");
131 calcPciIOAddr(Addr addr)
133 panic("Need implementation\n");
138 calcPciMemAddr(Addr addr)
140 panic("Need implementation\n");
145 * Serialize this object to the given output stream.
146 * @param os The stream to serialize to.
148 virtual void serialize(std::ostream &os);
151 * Reconstruct the state of this object from a checkpoint.
152 * @param cp The checkpoint use.
153 * @param section The section name of this object
155 virtual void unserialize(Checkpoint *cp, const std::string §ion);
158 #endif // __DEV_MALTA_HH__