src/dev/pcidev.hh

   1 /*
   2  * Copyright (c) 2013 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2004-2005 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  *
  40  * Authors: Ali Saidi
  41  *          Andrew Schultz
  42  *          Nathan Binkert
  43  */
  44
  45 /* @file
  46  * Interface for devices using PCI configuration
  47  */
  48
  49 #ifndef __DEV_PCIDEV_HH__
  50 #define __DEV_PCIDEV_HH__
  51
  52 #include <cstring>
  53 #include <vector>
  54
  55 #include "dev/dma_device.hh"
  56 #include "dev/pcireg.h"
  57 #include "dev/platform.hh"
  58 #include "params/PciDevice.hh"
  59 #include "sim/byteswap.hh"
  60
  61 #define BAR_IO_MASK 0x3
  62 #define BAR_MEM_MASK 0xF
  63 #define BAR_IO_SPACE_BIT 0x1
  64 #define BAR_IO_SPACE(x) ((x) & BAR_IO_SPACE_BIT)
  65 #define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
  66
  67
  68
  69 /**
  70  * PCI device, base implementation is only config space.
  71  */
  72 class PciDevice : public DmaDevice
  73 {
  74     class PciConfigPort : public SimpleTimingPort
  75     {
  76       protected:
  77         PciDevice *device;
  78
  79         virtual Tick recvAtomic(PacketPtr pkt);
  80
  81         virtual AddrRangeList getAddrRanges() const;
  82
  83         Platform *platform;
  84
  85         int busId;
  86         int deviceId;
  87         int functionId;
  88
  89         Addr configAddr;
  90
  91       public:
  92         PciConfigPort(PciDevice *dev, int busid, int devid, int funcid,
  93                       Platform *p);
  94     };
  95
  96   public:
  97     typedef PciDeviceParams Params;
  98     const Params *
  99     params() const
 100     {
 101         return dynamic_cast<const Params *>(_params);
 102     }
 103
 104   protected:
 105     /** The current config space.  */
 106     PCIConfig config;
 107     /** The capability list structures and base addresses
 108      * @{
 109      */
 110     const int PMCAP_BASE;
 111     const int PMCAP_ID_OFFSET;
 112     const int PMCAP_PC_OFFSET;
 113     const int PMCAP_PMCS_OFFSET;
 114     PMCAP pmcap;
 115
 116     const int MSICAP_BASE;
 117     MSICAP msicap;
 118
 119     const int MSIXCAP_BASE;
 120     const int MSIXCAP_ID_OFFSET;
 121     const int MSIXCAP_MXC_OFFSET;
 122     const int MSIXCAP_MTAB_OFFSET;
 123     const int MSIXCAP_MPBA_OFFSET;
 124     int MSIX_TABLE_OFFSET;
 125     int MSIX_TABLE_END;
 126     int MSIX_PBA_OFFSET;
 127     int MSIX_PBA_END;
 128     MSIXCAP msixcap;
 129
 130     const int PXCAP_BASE;
 131     PXCAP pxcap;
 132     /** @} */
 133
 134     /** MSIX Table and PBA Structures */
 135     std::vector<MSIXTable> msix_table;
 136     std::vector<MSIXPbaEntry> msix_pba;
 137
 138     /** The size of the BARs */
 139     uint32_t BARSize[6];
 140
 141     /** The current address mapping of the BARs */
 142     Addr BARAddrs[6];
 143
 144     /** Whether the BARs are really hardwired legacy IO locations. */
 145     bool legacyIO[6];
 146
 147     /**
 148      * Does the given address lie within the space mapped by the given
 149      * base address register?
 150      */
 151     bool
 152     isBAR(Addr addr, int bar) const
 153     {
 154         assert(bar >= 0 && bar < 6);
 155         return BARAddrs[bar] <= addr && addr < BARAddrs[bar] + BARSize[bar];
 156     }
 157
 158     /**
 159      * Which base address register (if any) maps the given address?
 160      * @return The BAR number (0-5 inclusive), or -1 if none.
 161      */
 162     int
 163     getBAR(Addr addr)
 164     {
 165         for (int i = 0; i <= 5; ++i)
 166             if (isBAR(addr, i))
 167                 return i;
 168
 169         return -1;
 170     }
 171
 172     /**
 173      * Which base address register (if any) maps the given address?
 174      * @param addr The address to check.
 175      * @retval bar The BAR number (0-5 inclusive),
 176      *             only valid if return value is true.
 177      * @retval offs The offset from the base address,
 178      *              only valid if return value is true.
 179      * @return True iff address maps to a base address register's region.
 180      */
 181     bool
 182     getBAR(Addr addr, int &bar, Addr &offs)
 183     {
 184         int b = getBAR(addr);
 185         if (b < 0)
 186             return false;
 187
 188         offs = addr - BARAddrs[b];
 189         bar = b;
 190         return true;
 191     }
 192
 193   protected:
 194     Platform *platform;
 195     Tick pioDelay;
 196     Tick configDelay;
 197     PciConfigPort configPort;
 198
 199     /**
 200      * Write to the PCI config space data that is stored locally. This may be
 201      * overridden by the device but at some point it will eventually call this
 202      * for normal operations that it does not need to override.
 203      * @param pkt packet containing the write the offset into config space
 204      */
 205     virtual Tick writeConfig(PacketPtr pkt);
 206
 207
 208     /**
 209      * Read from the PCI config space data that is stored locally. This may be
 210      * overridden by the device but at some point it will eventually call this
 211      * for normal operations that it does not need to override.
 212      * @param pkt packet containing the write the offset into config space
 213      */
 214     virtual Tick readConfig(PacketPtr pkt);
 215
 216   public:
 217     Addr pciToDma(Addr pciAddr) const
 218     { return platform->pciToDma(pciAddr); }
 219
 220     void
 221     intrPost()
 222     { platform->postPciInt(letoh(config.interruptLine)); }
 223
 224     void
 225     intrClear()
 226     { platform->clearPciInt(letoh(config.interruptLine)); }
 227
 228     uint8_t
 229     interruptLine()
 230     { return letoh(config.interruptLine); }
 231
 232     /**
 233      * Determine the address ranges that this device responds to.
 234      *
 235      * @return a list of non-overlapping address ranges
 236      */
 237     AddrRangeList getAddrRanges() const;
 238
 239     /**
 240      * Constructor for PCI Dev. This function copies data from the
 241      * config file object PCIConfigData and registers the device with
 242      * a PciConfigAll object.
 243      */
 244     PciDevice(const Params *params);
 245
 246     virtual void init();
 247
 248     /**
 249      * Serialize this object to the given output stream.
 250      * @param os The stream to serialize to.
 251      */
 252     virtual void serialize(std::ostream &os);
 253
 254     /**
 255      * Reconstruct the state of this object from a checkpoint.
 256      * @param cp The checkpoint use.
 257      * @param section The section name of this object
 258      */
 259     virtual void unserialize(Checkpoint *cp, const std::string &section);
 260
 261
 262     virtual unsigned int drain(DrainManager *dm);
 263
 264     virtual BaseSlavePort &getSlavePort(const std::string &if_name,
 265                                         PortID idx = InvalidPortID)
 266     {
 267         if (if_name == "config") {
 268             return configPort;
 269         }
 270         return DmaDevice::getSlavePort(if_name, idx);
 271     }
 272
 273 };
 274 #endif // __DEV_PCIDEV_HH__