src/dev/pcidev.hh

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Ali Saidi
  29  *          Andrew Schultz
  30  *          Nathan Binkert
  31  */
  32
  33 /* @file
  34  * Interface for devices using PCI configuration
  35  */
  36
  37 #ifndef __DEV_PCIDEV_HH__
  38 #define __DEV_PCIDEV_HH__
  39
  40 #include "dev/io_device.hh"
  41 #include "dev/pcireg.h"
  42 #include "dev/platform.hh"
  43
  44 #define BAR_IO_MASK 0x3
  45 #define BAR_MEM_MASK 0xF
  46 #define BAR_IO_SPACE_BIT 0x1
  47 #define BAR_IO_SPACE(x) ((x) & BAR_IO_SPACE_BIT)
  48 #define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
  49
  50
  51 /**
  52  * This class encapulates the first 64 bytes of a singles PCI
  53  * devices config space that in configured by the configuration file.
  54  */
  55 class PciConfigData : public SimObject
  56 {
  57   public:
  58     /**
  59      * Constructor to initialize the devices config space to 0.
  60      */
  61     PciConfigData(const std::string &name)
  62         : SimObject(name)
  63     {
  64         memset(config.data, 0, sizeof(config.data));
  65         memset(BARSize, 0, sizeof(BARSize));
  66     }
  67
  68     /** The first 64 bytes */
  69     PCIConfig config;
  70
  71     /** The size of the BARs */
  72     uint32_t BARSize[6];
  73 };
  74
  75
  76 /**
  77  * PCI device, base implementation is only config space.
  78  */
  79 class PciDev : public DmaDevice
  80 {
  81     class PciConfigPort : public SimpleTimingPort
  82     {
  83       protected:
  84         PciDev *device;
  85
  86         virtual Tick recvAtomic(Packet *pkt);
  87
  88         virtual void getDeviceAddressRanges(AddrRangeList &resp,
  89                                             AddrRangeList &snoop);
  90
  91         Platform *platform;
  92
  93         int busId;
  94         int deviceId;
  95         int functionId;
  96
  97         Addr configAddr;
  98
  99       public:
 100         PciConfigPort(PciDev *dev, int busid, int devid, int funcid,
 101                       Platform *p);
 102     };
 103
 104   public:
 105     struct Params : public PioDevice::Params
 106     {
 107         /**
 108          * A pointer to the object that contains the first 64 bytes of
 109          * config space
 110          */
 111         PciConfigData *configData;
 112
 113         /** The bus number we are on */
 114         uint32_t busNum;
 115
 116         /** The device number we have */
 117         uint32_t deviceNum;
 118
 119         /** The function number */
 120         uint32_t functionNum;
 121
 122         /** The latency for pio accesses. */
 123         Tick pio_delay;
 124
 125         /** The latency for a config access. */
 126         Tick config_delay;
 127     };
 128
 129   public:
 130     const Params *params() const { return (const Params *)_params; }
 131
 132   protected:
 133     /** The current config space. Unlike the PciConfigData this is
 134      * updated during simulation while continues to reflect what was
 135      * in the config file.
 136      */
 137     PCIConfig config;
 138
 139     /** The size of the BARs */
 140     uint32_t BARSize[6];
 141
 142     /** The current address mapping of the BARs */
 143     Addr BARAddrs[6];
 144
 145     /**
 146      * Does the given address lie within the space mapped by the given
 147      * base address register?
 148      */
 149     bool
 150     isBAR(Addr addr, int bar) const
 151     {
 152         assert(bar >= 0 && bar < 6);
 153         return BARAddrs[bar] <= addr && addr < BARAddrs[bar] + BARSize[bar];
 154     }
 155
 156     /**
 157      * Which base address register (if any) maps the given address?
 158      * @return The BAR number (0-5 inclusive), or -1 if none.
 159      */
 160     int
 161     getBAR(Addr addr)
 162     {
 163         for (int i = 0; i <= 5; ++i)
 164             if (isBAR(addr, i))
 165                 return i;
 166
 167         return -1;
 168     }
 169
 170     /**
 171      * Which base address register (if any) maps the given address?
 172      * @param addr The address to check.
 173      * @retval bar The BAR number (0-5 inclusive),
 174      *             only valid if return value is true.
 175      * @retval offs The offset from the base address,
 176      *              only valid if return value is true.
 177      * @return True iff address maps to a base address register's region.
 178      */
 179     bool
 180     getBAR(Addr addr, int &bar, Addr &offs)
 181     {
 182         int b = getBAR(addr);
 183         if (b < 0)
 184             return false;
 185
 186         offs = addr - BARAddrs[b];
 187         bar = b;
 188         return true;
 189     }
 190
 191   protected:
 192     Platform *plat;
 193     PciConfigData *configData;
 194     Tick pioDelay;
 195     Tick configDelay;
 196     PciConfigPort *configPort;
 197
 198     /**
 199      * Write to the PCI config space data that is stored locally. This may be
 200      * overridden by the device but at some point it will eventually call this
 201      * for normal operations that it does not need to override.
 202      * @param pkt packet containing the write the offset into config space
 203      */
 204     virtual Tick writeConfig(Packet *pkt);
 205
 206
 207     /**
 208      * Read from the PCI config space data that is stored locally. This may be
 209      * overridden by the device but at some point it will eventually call this
 210      * for normal operations that it does not need to override.
 211      * @param pkt packet containing the write the offset into config space
 212      */
 213     virtual Tick readConfig(Packet *pkt);
 214
 215   public:
 216     Addr pciToDma(Addr pciAddr) const
 217     { return plat->pciToDma(pciAddr); }
 218
 219     void
 220     intrPost()
 221     { plat->postPciInt(letoh(configData->config.interruptLine)); }
 222
 223     void
 224     intrClear()
 225     { plat->clearPciInt(letoh(configData->config.interruptLine)); }
 226
 227     uint8_t
 228     interruptLine()
 229     { return letoh(configData->config.interruptLine); }
 230
 231     /** return the address ranges that this device responds to.
 232      * @params range_list range list to populate with ranges
 233      */
 234     void addressRanges(AddrRangeList &range_list);
 235
 236     /**
 237      * Constructor for PCI Dev. This function copies data from the
 238      * config file object PCIConfigData and registers the device with
 239      * a PciConfigAll object.
 240      */
 241     PciDev(Params *params);
 242
 243     virtual void init();
 244
 245     /**
 246      * Serialize this object to the given output stream.
 247      * @param os The stream to serialize to.
 248      */
 249     virtual void serialize(std::ostream &os);
 250
 251     /**
 252      * Reconstruct the state of this object from a checkpoint.
 253      * @param cp The checkpoint use.
 254      * @param section The section name of this object
 255      */
 256     virtual void unserialize(Checkpoint *cp, const std::string &section);
 257
 258
 259     virtual unsigned int drain(Event *de);
 260
 261     virtual Port *getPort(const std::string &if_name, int idx = -1)
 262     {
 263         if (if_name == "config") {
 264             if (configPort != NULL)
 265                 panic("pciconfig port already connected to.");
 266             configPort = new PciConfigPort(this, params()->busNum,
 267                     params()->deviceNum, params()->functionNum,
 268                     params()->platform);
 269             return configPort;
 270         }
 271         return DmaDevice::getPort(if_name, idx);
 272     }
 273
 274 };
 275 #endif // __DEV_PCIDEV_HH__