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34 * Interface for devices using PCI configuration
37 #ifndef __DEV_PCIDEV_HH__
38 #define __DEV_PCIDEV_HH__
42 #include "dev/io_device.hh"
43 #include "dev/pcireg.h"
44 #include "dev/platform.hh"
45 #include "params/PciDevice.hh"
46 #include "sim/byteswap.hh"
48 #define BAR_IO_MASK 0x3
49 #define BAR_MEM_MASK 0xF
50 #define BAR_IO_SPACE_BIT 0x1
51 #define BAR_IO_SPACE(x) ((x) & BAR_IO_SPACE_BIT)
52 #define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
57 * PCI device, base implementation is only config space.
59 class PciDev : public DmaDevice
61 class PciConfigPort : public SimpleTimingPort
66 virtual Tick recvAtomic(PacketPtr pkt);
68 virtual void getDeviceAddressRanges(AddrRangeList &resp,
80 PciConfigPort(PciDev *dev, int busid, int devid, int funcid,
85 typedef PciDeviceParams Params;
89 return dynamic_cast<const Params *>(_params);
93 /** The current config space. */
96 /** The size of the BARs */
99 /** The current address mapping of the BARs */
102 /** Whether the BARs are really hardwired legacy IO locations. */
106 * Does the given address lie within the space mapped by the given
107 * base address register?
110 isBAR(Addr addr, int bar) const
112 assert(bar >= 0 && bar < 6);
113 return BARAddrs[bar] <= addr && addr < BARAddrs[bar] + BARSize[bar];
117 * Which base address register (if any) maps the given address?
118 * @return The BAR number (0-5 inclusive), or -1 if none.
123 for (int i = 0; i <= 5; ++i)
131 * Which base address register (if any) maps the given address?
132 * @param addr The address to check.
133 * @retval bar The BAR number (0-5 inclusive),
134 * only valid if return value is true.
135 * @retval offs The offset from the base address,
136 * only valid if return value is true.
137 * @return True iff address maps to a base address register's region.
140 getBAR(Addr addr, int &bar, Addr &offs)
142 int b = getBAR(addr);
146 offs = addr - BARAddrs[b];
155 PciConfigPort *configPort;
158 * Write to the PCI config space data that is stored locally. This may be
159 * overridden by the device but at some point it will eventually call this
160 * for normal operations that it does not need to override.
161 * @param pkt packet containing the write the offset into config space
163 virtual Tick writeConfig(PacketPtr pkt);
167 * Read from the PCI config space data that is stored locally. This may be
168 * overridden by the device but at some point it will eventually call this
169 * for normal operations that it does not need to override.
170 * @param pkt packet containing the write the offset into config space
172 virtual Tick readConfig(PacketPtr pkt);
175 Addr pciToDma(Addr pciAddr) const
176 { return platform->pciToDma(pciAddr); }
180 { platform->postPciInt(letoh(config.interruptLine)); }
184 { platform->clearPciInt(letoh(config.interruptLine)); }
188 { return letoh(config.interruptLine); }
190 /** return the address ranges that this device responds to.
191 * @params range_list range list to populate with ranges
193 void addressRanges(AddrRangeList &range_list);
196 * Constructor for PCI Dev. This function copies data from the
197 * config file object PCIConfigData and registers the device with
198 * a PciConfigAll object.
200 PciDev(const Params *params);
205 * Serialize this object to the given output stream.
206 * @param os The stream to serialize to.
208 virtual void serialize(std::ostream &os);
211 * Reconstruct the state of this object from a checkpoint.
212 * @param cp The checkpoint use.
213 * @param section The section name of this object
215 virtual void unserialize(Checkpoint *cp, const std::string §ion);
218 virtual unsigned int drain(Event *de);
220 virtual Port *getPort(const std::string &if_name, int idx = -1)
222 if (if_name == "config") {
223 if (configPort != NULL)
224 panic("pciconfig port already connected to.");
225 configPort = new PciConfigPort(this, params()->pci_bus,
226 params()->pci_dev, params()->pci_func,
230 return DmaDevice::getPort(if_name, idx);
234 #endif // __DEV_PCIDEV_HH__