2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 * Interface for devices using PCI configuration
37 #ifndef __DEV_PCIDEV_HH__
38 #define __DEV_PCIDEV_HH__
42 #include "dev/dma_device.hh"
43 #include "dev/pcireg.h"
44 #include "dev/platform.hh"
45 #include "params/PciDevice.hh"
46 #include "sim/byteswap.hh"
48 #define BAR_IO_MASK 0x3
49 #define BAR_MEM_MASK 0xF
50 #define BAR_IO_SPACE_BIT 0x1
51 #define BAR_IO_SPACE(x) ((x) & BAR_IO_SPACE_BIT)
52 #define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
57 * PCI device, base implementation is only config space.
59 class PciDev : public DmaDevice
61 class PciConfigPort : public SimpleTimingPort
66 virtual Tick recvAtomic(PacketPtr pkt);
68 virtual AddrRangeList getAddrRanges() const;
79 PciConfigPort(PciDev *dev, int busid, int devid, int funcid,
84 typedef PciDeviceParams Params;
88 return dynamic_cast<const Params *>(_params);
92 /** The current config space. */
95 /** The size of the BARs */
98 /** The current address mapping of the BARs */
101 /** Whether the BARs are really hardwired legacy IO locations. */
105 * Does the given address lie within the space mapped by the given
106 * base address register?
109 isBAR(Addr addr, int bar) const
111 assert(bar >= 0 && bar < 6);
112 return BARAddrs[bar] <= addr && addr < BARAddrs[bar] + BARSize[bar];
116 * Which base address register (if any) maps the given address?
117 * @return The BAR number (0-5 inclusive), or -1 if none.
122 for (int i = 0; i <= 5; ++i)
130 * Which base address register (if any) maps the given address?
131 * @param addr The address to check.
132 * @retval bar The BAR number (0-5 inclusive),
133 * only valid if return value is true.
134 * @retval offs The offset from the base address,
135 * only valid if return value is true.
136 * @return True iff address maps to a base address register's region.
139 getBAR(Addr addr, int &bar, Addr &offs)
141 int b = getBAR(addr);
145 offs = addr - BARAddrs[b];
154 PciConfigPort configPort;
157 * Write to the PCI config space data that is stored locally. This may be
158 * overridden by the device but at some point it will eventually call this
159 * for normal operations that it does not need to override.
160 * @param pkt packet containing the write the offset into config space
162 virtual Tick writeConfig(PacketPtr pkt);
166 * Read from the PCI config space data that is stored locally. This may be
167 * overridden by the device but at some point it will eventually call this
168 * for normal operations that it does not need to override.
169 * @param pkt packet containing the write the offset into config space
171 virtual Tick readConfig(PacketPtr pkt);
174 Addr pciToDma(Addr pciAddr) const
175 { return platform->pciToDma(pciAddr); }
179 { platform->postPciInt(letoh(config.interruptLine)); }
183 { platform->clearPciInt(letoh(config.interruptLine)); }
187 { return letoh(config.interruptLine); }
190 * Determine the address ranges that this device responds to.
192 * @return a list of non-overlapping address ranges
194 AddrRangeList getAddrRanges() const;
197 * Constructor for PCI Dev. This function copies data from the
198 * config file object PCIConfigData and registers the device with
199 * a PciConfigAll object.
201 PciDev(const Params *params);
206 * Serialize this object to the given output stream.
207 * @param os The stream to serialize to.
209 virtual void serialize(std::ostream &os);
212 * Reconstruct the state of this object from a checkpoint.
213 * @param cp The checkpoint use.
214 * @param section The section name of this object
216 virtual void unserialize(Checkpoint *cp, const std::string §ion);
219 virtual unsigned int drain(DrainManager *dm);
221 virtual BaseSlavePort &getSlavePort(const std::string &if_name,
222 PortID idx = InvalidPortID)
224 if (if_name == "config") {
227 return DmaDevice::getSlavePort(if_name, idx);
231 #endif // __DEV_PCIDEV_HH__