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34 * Interface for devices using PCI configuration
37 #ifndef __DEV_PCIDEV_HH__
38 #define __DEV_PCIDEV_HH__
40 #include "dev/io_device.hh"
41 #include "dev/pcireg.h"
42 #include "dev/platform.hh"
44 #define BAR_IO_MASK 0x3
45 #define BAR_MEM_MASK 0xF
46 #define BAR_IO_SPACE_BIT 0x1
47 #define BAR_IO_SPACE(x) ((x) & BAR_IO_SPACE_BIT)
48 #define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
52 * This class encapulates the first 64 bytes of a singles PCI
53 * devices config space that in configured by the configuration file.
55 class PciConfigData : public SimObject
59 * Constructor to initialize the devices config space to 0.
61 PciConfigData(const std::string &name)
64 memset(config.data, 0, sizeof(config.data));
65 memset(BARAddrs, 0, sizeof(BARAddrs));
66 memset(BARSize, 0, sizeof(BARSize));
69 /** The first 64 bytes */
72 /** The size of the BARs */
75 /** The addresses of the BARs */
81 * PCI device, base implementation is only config space.
83 class PciDev : public DmaDevice
85 class PciConfigPort : public PioPort
90 virtual bool recvTiming(Packet *pkt);
92 virtual Tick recvAtomic(Packet *pkt);
94 virtual void recvFunctional(Packet *pkt) ;
96 virtual void getDeviceAddressRanges(AddrRangeList &resp,
97 AddrRangeList &snoop);
108 PciConfigPort(PciDev *dev, int busid, int devid, int funcid,
111 friend class PioPort::SendEvent;
115 struct Params : public PioDevice::Params
118 * A pointer to the object that contains the first 64 bytes of
121 PciConfigData *configData;
123 /** The bus number we are on */
126 /** The device number we have */
129 /** The function number */
130 uint32_t functionNum;
132 /** The latency for pio accesses. */
135 /** The latency for a config access. */
140 const Params *params() const { return (const Params *)_params; }
143 /** The current config space. Unlike the PciConfigData this is
144 * updated during simulation while continues to reflect what was
145 * in the config file.
149 /** The size of the BARs */
152 /** The current address mapping of the BARs */
156 * Does the given address lie within the space mapped by the given
157 * base address register?
160 isBAR(Addr addr, int bar) const
162 assert(bar >= 0 && bar < 6);
163 return BARAddrs[bar] <= addr && addr < BARAddrs[bar] + BARSize[bar];
167 * Which base address register (if any) maps the given address?
168 * @return The BAR number (0-5 inclusive), or -1 if none.
173 for (int i = 0; i <= 5; ++i)
181 * Which base address register (if any) maps the given address?
182 * @param addr The address to check.
183 * @retval bar The BAR number (0-5 inclusive),
184 * only valid if return value is true.
185 * @retval offs The offset from the base address,
186 * only valid if return value is true.
187 * @return True iff address maps to a base address register's region.
190 getBAR(Addr addr, int &bar, Addr &offs)
192 int b = getBAR(addr);
196 offs = addr - BARAddrs[b];
203 PciConfigData *configData;
206 PciConfigPort *configPort;
209 * Write to the PCI config space data that is stored locally. This may be
210 * overridden by the device but at some point it will eventually call this
211 * for normal operations that it does not need to override.
212 * @param pkt packet containing the write the offset into config space
214 virtual Tick writeConfig(Packet *pkt);
218 * Read from the PCI config space data that is stored locally. This may be
219 * overridden by the device but at some point it will eventually call this
220 * for normal operations that it does not need to override.
221 * @param pkt packet containing the write the offset into config space
223 virtual Tick readConfig(Packet *pkt);
226 Addr pciToDma(Addr pciAddr) const
227 { return plat->pciToDma(pciAddr); }
231 { plat->postPciInt(letoh(configData->config.interruptLine)); }
235 { plat->clearPciInt(letoh(configData->config.interruptLine)); }
239 { return letoh(configData->config.interruptLine); }
241 /** return the address ranges that this device responds to.
242 * @params range_list range list to populate with ranges
244 void addressRanges(AddrRangeList &range_list);
246 /** Do a PCI Configspace memory access. */
247 Tick recvConfig(Packet *pkt)
248 { return pkt->isRead() ? readConfig(pkt) : writeConfig(pkt); }
251 * Constructor for PCI Dev. This function copies data from the
252 * config file object PCIConfigData and registers the device with
253 * a PciConfigAll object.
255 PciDev(Params *params);
260 * Serialize this object to the given output stream.
261 * @param os The stream to serialize to.
263 virtual void serialize(std::ostream &os);
266 * Reconstruct the state of this object from a checkpoint.
267 * @param cp The checkpoint use.
268 * @param section The section name of this object
270 virtual void unserialize(Checkpoint *cp, const std::string §ion);
273 virtual unsigned int drain(Event *de);
275 virtual Port *getPort(const std::string &if_name, int idx = -1)
277 if (if_name == "config") {
278 if (configPort != NULL)
279 panic("pciconfig port already connected to.");
280 configPort = new PciConfigPort(this, params()->busNum,
281 params()->deviceNum, params()->functionNum,
285 return DmaDevice::getPort(if_name, idx);
289 #endif // __DEV_PCIDEV_HH__