src/dev/pcidev.hh

   1 /*
   2  * Copyright (c) 2013 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2004-2005 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  *
  40  * Authors: Ali Saidi
  41  *          Andrew Schultz
  42  *          Nathan Binkert
  43  */
  44
  45 /* @file
  46  * Interface for devices using PCI configuration
  47  */
  48
  49 #ifndef __DEV_PCIDEV_HH__
  50 #define __DEV_PCIDEV_HH__
  51
  52 #include <cstring>
  53 #include <vector>
  54
  55 #include "dev/dma_device.hh"
  56 #include "dev/pcireg.h"
  57 #include "dev/platform.hh"
  58 #include "params/PciDevice.hh"
  59 #include "sim/byteswap.hh"
  60
  61 #define BAR_IO_MASK 0x3
  62 #define BAR_MEM_MASK 0xF
  63 #define BAR_IO_SPACE_BIT 0x1
  64 #define BAR_IO_SPACE(x) ((x) & BAR_IO_SPACE_BIT)
  65 #define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
  66
  67
  68
  69 /**
  70  * PCI device, base implementation is only config space.
  71  */
  72 class PciDevice : public DmaDevice
  73 {
  74     class PciConfigPort : public SimpleTimingPort
  75     {
  76       protected:
  77         PciDevice *device;
  78
  79         virtual Tick recvAtomic(PacketPtr pkt);
  80
  81         virtual AddrRangeList getAddrRanges() const;
  82
  83         Platform *platform;
  84
  85         int busId;
  86         int deviceId;
  87         int functionId;
  88
  89         Addr configAddr;
  90
  91       public:
  92         PciConfigPort(PciDevice *dev, int busid, int devid, int funcid,
  93                       Platform *p);
  94     };
  95
  96   public:
  97     typedef PciDeviceParams Params;
  98     const Params *
  99     params() const
 100     {
 101         return dynamic_cast<const Params *>(_params);
 102     }
 103
 104   protected:
 105     /** The current config space.  */
 106     PCIConfig config;
 107     /** The capability list structures and base addresses
 108      * @{
 109      */
 110     const int PMCAP_BASE;
 111     PMCAP pmcap;
 112
 113     const int MSICAP_BASE;
 114     MSICAP msicap;
 115
 116     const int MSIXCAP_BASE;
 117     MSIXCAP msixcap;
 118
 119     const int PXCAP_BASE;
 120     PXCAP pxcap;
 121     /** @} */
 122
 123     /** MSIX Table and PBA Structures */
 124     std::vector<MSIXTable> msix_table;
 125     std::vector<MSIXPbaEntry> msix_pba;
 126
 127     /** The size of the BARs */
 128     uint32_t BARSize[6];
 129
 130     /** The current address mapping of the BARs */
 131     Addr BARAddrs[6];
 132
 133     /** Whether the BARs are really hardwired legacy IO locations. */
 134     bool legacyIO[6];
 135
 136     /**
 137      * Does the given address lie within the space mapped by the given
 138      * base address register?
 139      */
 140     bool
 141     isBAR(Addr addr, int bar) const
 142     {
 143         assert(bar >= 0 && bar < 6);
 144         return BARAddrs[bar] <= addr && addr < BARAddrs[bar] + BARSize[bar];
 145     }
 146
 147     /**
 148      * Which base address register (if any) maps the given address?
 149      * @return The BAR number (0-5 inclusive), or -1 if none.
 150      */
 151     int
 152     getBAR(Addr addr)
 153     {
 154         for (int i = 0; i <= 5; ++i)
 155             if (isBAR(addr, i))
 156                 return i;
 157
 158         return -1;
 159     }
 160
 161     /**
 162      * Which base address register (if any) maps the given address?
 163      * @param addr The address to check.
 164      * @retval bar The BAR number (0-5 inclusive),
 165      *             only valid if return value is true.
 166      * @retval offs The offset from the base address,
 167      *              only valid if return value is true.
 168      * @return True iff address maps to a base address register's region.
 169      */
 170     bool
 171     getBAR(Addr addr, int &bar, Addr &offs)
 172     {
 173         int b = getBAR(addr);
 174         if (b < 0)
 175             return false;
 176
 177         offs = addr - BARAddrs[b];
 178         bar = b;
 179         return true;
 180     }
 181
 182   protected:
 183     Platform *platform;
 184     Tick pioDelay;
 185     Tick configDelay;
 186     PciConfigPort configPort;
 187
 188     /**
 189      * Write to the PCI config space data that is stored locally. This may be
 190      * overridden by the device but at some point it will eventually call this
 191      * for normal operations that it does not need to override.
 192      * @param pkt packet containing the write the offset into config space
 193      */
 194     virtual Tick writeConfig(PacketPtr pkt);
 195
 196
 197     /**
 198      * Read from the PCI config space data that is stored locally. This may be
 199      * overridden by the device but at some point it will eventually call this
 200      * for normal operations that it does not need to override.
 201      * @param pkt packet containing the write the offset into config space
 202      */
 203     virtual Tick readConfig(PacketPtr pkt);
 204
 205   public:
 206     Addr pciToDma(Addr pciAddr) const
 207     { return platform->pciToDma(pciAddr); }
 208
 209     void
 210     intrPost()
 211     { platform->postPciInt(letoh(config.interruptLine)); }
 212
 213     void
 214     intrClear()
 215     { platform->clearPciInt(letoh(config.interruptLine)); }
 216
 217     uint8_t
 218     interruptLine()
 219     { return letoh(config.interruptLine); }
 220
 221     /**
 222      * Determine the address ranges that this device responds to.
 223      *
 224      * @return a list of non-overlapping address ranges
 225      */
 226     AddrRangeList getAddrRanges() const;
 227
 228     /**
 229      * Constructor for PCI Dev. This function copies data from the
 230      * config file object PCIConfigData and registers the device with
 231      * a PciConfigAll object.
 232      */
 233     PciDevice(const Params *params);
 234
 235     virtual void init();
 236
 237     /**
 238      * Serialize this object to the given output stream.
 239      * @param os The stream to serialize to.
 240      */
 241     virtual void serialize(std::ostream &os);
 242
 243     /**
 244      * Reconstruct the state of this object from a checkpoint.
 245      * @param cp The checkpoint use.
 246      * @param section The section name of this object
 247      */
 248     virtual void unserialize(Checkpoint *cp, const std::string &section);
 249
 250
 251     virtual unsigned int drain(DrainManager *dm);
 252
 253     virtual BaseSlavePort &getSlavePort(const std::string &if_name,
 254                                         PortID idx = InvalidPortID)
 255     {
 256         if (if_name == "config") {
 257             return configPort;
 258         }
 259         return DmaDevice::getSlavePort(if_name, idx);
 260     }
 261
 262 };
 263 #endif // __DEV_PCIDEV_HH__