Merge ktlim@zizzer:/bk/newmem
[gem5.git] / src / dev / platform.cc
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 * Nathan Binkert
30 */
31
32 #include "dev/platform.hh"
33 #include "sim/builder.hh"
34 #include "sim/sim_exit.hh"
35
36 using namespace std;
37 using namespace TheISA;
38
39 Platform::Platform(const string &name, IntrControl *intctrl)
40 : SimObject(name), intrctrl(intctrl)
41 {
42 }
43
44 Platform::~Platform()
45 {
46 }
47
48 void
49 Platform::postPciInt(int line)
50 {
51 panic("No PCI interrupt support in platform.");
52 }
53
54 void
55 Platform::clearPciInt(int line)
56 {
57 panic("No PCI interrupt support in platform.");
58 }
59
60 Addr
61 Platform::pciToDma(Addr pciAddr) const
62 {
63 panic("No PCI dma support in platform.");
64 }
65
66 void
67 Platform::registerPciDevice(uint8_t bus, uint8_t dev, uint8_t func, uint8_t intr)
68 {
69 uint32_t bdf = bus << 16 | dev << 8 | func << 0;
70 if (pciDevices.find(bdf) != pciDevices.end())
71 fatal("Two PCI devices have same bus:device:function\n");
72
73 if (intLines.test(intr))
74 fatal("Two PCI devices have same interrupt line: %d\n", intr);
75
76 pciDevices.insert(bdf);
77
78 intLines.set(intr);
79 }
80
81
82 DEFINE_SIM_OBJECT_CLASS_NAME("Platform", Platform)
83