Merge zizzer.eecs.umich.edu:/bk/newmem
[gem5.git] / src / dev / platform.cc
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 * Nathan Binkert
30 */
31
32 #include "base/misc.hh"
33 #include "dev/platform.hh"
34 #include "sim/builder.hh"
35 #include "sim/sim_exit.hh"
36
37 using namespace std;
38 using namespace TheISA;
39
40 Platform::Platform(const string &name, IntrControl *intctrl)
41 : SimObject(name), intrctrl(intctrl)
42 {
43 }
44
45 Platform::~Platform()
46 {
47 }
48
49 void
50 Platform::postPciInt(int line)
51 {
52 panic("No PCI interrupt support in platform.");
53 }
54
55 void
56 Platform::clearPciInt(int line)
57 {
58 panic("No PCI interrupt support in platform.");
59 }
60
61 Addr
62 Platform::pciToDma(Addr pciAddr) const
63 {
64 panic("No PCI dma support in platform.");
65 }
66
67 void
68 Platform::registerPciDevice(uint8_t bus, uint8_t dev, uint8_t func, uint8_t intr)
69 {
70 uint32_t bdf = bus << 16 | dev << 8 | func << 0;
71 if (pciDevices.find(bdf) != pciDevices.end())
72 fatal("Two PCI devices have same bus:device:function\n");
73
74 if (intLines.test(intr))
75 fatal("Two PCI devices have same interrupt line: %d\n", intr);
76
77 pciDevices.insert(bdf);
78
79 intLines.set(intr);
80 }
81
82
83 DEFINE_SIM_OBJECT_CLASS_NAME("Platform", Platform)
84