src/dev/uart8250.hh

   1 /*
   2  * Copyright (c) 2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Ali Saidi
  29  */
  30
  31 /** @file
  32  * Defines a 8250 UART
  33  */
  34
  35 #ifndef __DEV_UART8250_HH__
  36 #define __DEV_UART8250_HH__
  37
  38 #include "dev/tsunamireg.h"
  39 #include "base/range.hh"
  40 #include "dev/io_device.hh"
  41 #include "dev/uart.hh"
  42
  43
  44 /* UART8250 Interrupt ID Register
  45  *  bit 0    Interrupt Pending 0 = true, 1 = false
  46  *  bit 2:1  ID of highest priority interrupt
  47  *  bit 7:3  zeroes
  48  */
  49 const uint8_t IIR_NOPEND = 0x1;
  50
  51 // Interrupt IDs
  52 const uint8_t IIR_MODEM = 0x00; /* Modem Status (lowest priority) */
  53 const uint8_t IIR_TXID  = 0x02; /* Tx Data */
  54 const uint8_t IIR_RXID  = 0x04; /* Rx Data */
  55 const uint8_t IIR_LINE  = 0x06; /* Rx Line Status (highest priority)*/
  56
  57 class SimConsole;
  58 class Platform;
  59
  60 class Uart8250 : public Uart
  61 {
  62
  63
  64   protected:
  65     uint8_t IER, DLAB, LCR, MCR;
  66
  67     class IntrEvent : public Event
  68     {
  69         protected:
  70             Uart8250 *uart;
  71             int intrBit;
  72         public:
  73             IntrEvent(Uart8250 *u, int bit);
  74             virtual void process();
  75             virtual const char *description();
  76             void scheduleIntr();
  77     };
  78
  79     IntrEvent txIntrEvent;
  80     IntrEvent rxIntrEvent;
  81
  82   public:
  83     Uart8250(Params *p);
  84
  85     virtual Tick read(Packet *pkt);
  86     virtual Tick write(Packet *pkt);
  87     virtual void addressRanges(AddrRangeList &range_list);
  88
  89
  90     /**
  91      * Inform the uart that there is data available.
  92      */
  93     virtual void dataAvailable();
  94
  95
  96     /**
  97      * Return if we have an interrupt pending
  98      * @return interrupt status
  99      */
 100     virtual bool intStatus() { return status ? true : false; }
 101
 102     virtual void serialize(std::ostream &os);
 103     virtual void unserialize(Checkpoint *cp, const std::string &section);
 104
 105 };
 106
 107 #endif // __TSUNAMI_UART_HH__